القائمة
Use for deterministic validation of foundry RTL changes with static checks and optional EDA tools such as Verilator, Icarus Verilog, and Yosys.
التثبيت باستخدام Codex أو Claude انسخ هذا Prompt والصقه في Codex أو Claude أو مساعد آخر ليراجع صفحة Skill ويثبّتها لك.
استنادا إلى تصنيف SOC المهني
Launch or describe the visible parent/child conversation workflow for foundry RTL requests. Use when an OpenHands automation receives an RTL request and needs a parent orchestrator plus read-only child scout conversations before implementation.
Use for foundry RTL tasks involving ChipCraftX RTL generation, model-route evidence, GitHub implementation issues, and handoff to EDA validation.
Use for Foundry IT requests that need model/tool routing, child automation handoff, air-gapped handling, RTL implementation, or EDA validation policy.
Read-only context scout for foundry RTL requests. Use before implementation when Codex/OpenHands needs to gather spec, repo, toolchain, and model-route context without editing code.
| name | foundry-eda-validation |
| description | Use for deterministic validation of foundry RTL changes with static checks and optional EDA tools such as Verilator, Icarus Verilog, and Yosys. |
EDA tools and deterministic checks are the correctness authority. Model output is useful for generation and summarization, but RTL changes are not complete until validation evidence is captured.
scripts/validate_rtl.sh: validates the examples/sync_fifo/ starter RTL
and testbench by default, then runs Verilator, Icarus Verilog, and Yosys when
those tools are installed.Run it from the repository root:
bash skills/foundry-eda-validation/scripts/validate_rtl.sh
For explicit files:
bash skills/foundry-eda-validation/scripts/validate_rtl.sh examples/sync_fifo/sync_fifo.sv examples/sync_fifo/sync_fifo_tb.sv
Always report: