#001cpphdl1 skills481updated 2026-06-21100% of creatorskilloccupationdescriptionupdatedcpphdl-verilator-rtlsoftware-developersUse when writing or debugging CppHDL tests that mix C++ testbench models with Verilated RTL, especially reset ordering, register inputs, AXI4 responder wiring, eval sequencing, _assign/_strobe discipline, and avoiding C++/SystemVerilog simulation mismatches.2026-06-21