riscv-backend
Implement issue
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Implement issue
Instalar con Codex o Claude Copia este prompt, pégalo en Codex, Claude u otro asistente, y deja que revise la página de la skill y la instale por ti.
Basado en la clasificación ocupacional SOC
Execute Milestone Z release-candidate burn-in work for issue
Implement Milestone I sub-issues — floating-point arithmetic lowering (SSE2/NEON/RV F+D extensions, FP register class, FP calling convention) and non-promotable memory (stack frame, SP-relative alloca/load/store, non-constant GEP) across all backends.
Implement issue
Implement issue
Implement issue
Implement and verify issue
| name | riscv-backend |
| description | Implement issue |
Use this skill to execute issue #89 in incremental, test-first steps.
llvm-target-riscv crate and workspace wiring.InstrKind coverage as x86/aarch64 backends.src/llvm-target-riscv crate.regs.rs, abi.rs, instructions.rs, lower.rs, encode.rs, lib.rs.RiscVBackend and RiscVEmitter with interfaces matching existing target crates.x0 hardwired zero).a0..a7, return reg a0.llvm_codegen::emit::Emitter.Run at minimum:
cargo +stable test -p llvm-target-riscv
cargo +stable test
If riscv64-linux-gnu-objdump is unavailable, document blocker and keep object-shape tests deterministic.
cargo +stable test unless blocked).gh pr review --comment or gh pr comment) with findings and fixes.references/issue-89-plan.md for acceptance checklist.scripts/riscv_coverage_audit.sh to track lowering/encoding progress.