Exécutez n'importe quel Skill dans Manus
en un clic

Exécutez n'importe quel Skill dans Manus en un clic

vivado-cdc

Étoiles3

Forks0

Mis à jour22 avril 2026 à 23:03

Analyze and fix clock domain crossing violations. Use when CDC violations appear, when auditing multi-clock designs, or when reviewing set_false_path and set_max_delay exceptions for safety.

Installation

Installer avec Codex ou Claude Copiez ce prompt, collez-le dans Codex, Claude ou un autre assistant, puis laissez-le vérifier la page du skill et l'installer pour vous.

Exécuter dans Manus

Source

devansh0703

devansh0703/vivaclaw-agent

Ouvrir le dépôt GitHub Voir les dépôts du créateur

Téléchargement

Exécuter dans Manus

Métiers associésSOC

Basé sur la classification professionnelle SOC

Développeurs de logicielsProfessions informatiques et mathématiques·SOC 15-1252

SKILL.md

readonly

name	vivado-cdc
version	1.0.0
description	Analyze and fix clock domain crossing violations. Use when CDC violations appear, when auditing multi-clock designs, or when reviewing set_false_path and set_max_delay exceptions for safety.
metadata	{"openclaw":{"requires":{"bins":["vivado"]},"emoji":"🔀"}}

Vivado CDC Runbook

1. CDC Reporting

report_cdc -details -waived -file /tmp/vivaclaw_rpt/cdc_details.rpt
report_clock_interaction -delay_type min_max -significant_only -file /tmp/vivaclaw_rpt/clock_interaction.rpt

2. CDC Classifications & Fixes

Type	Classification	Action
A	Single-bit Control	2-FF Sync + `ASYNC_REG TRUE`
B	Multi-bit Data Bus	FIFO/Handshake ONLY. Review Required.
C	Gray Counter	`set_max_delay -datapath_only <period_dst>`
D	FIFO Crossing	Verify depth/flags sync.
E	MUX Static Path	`set_false_path` (Static signals only).
F	Reset Crossing	Async assert, Sync deassert.

3. Asynchronous Clock Groups

set_clock_groups -asynchronous \
  -group [get_clocks clk_a] \
  -group [get_clocks clk_b]

4. MTBF Analysis

report_synchronizer_mtbf -file /tmp/vivaclaw_rpt/mtbf.rpt

Target: >1e6 hours. If lower, increase sync chain depth to 3 FFs.

5. Waiver Protocol

Every waived path must include a reason: # CDC WAIVER | Type: <X> | Reason: <description> | Confirmed: VivaClaw

Plus depuis ce dépôt

même dépôt

vivado-flow

devansh0703/vivaclaw-agent

Run a complete Vivado FPGA design flow from RTL sources to bitstream. Use when asked to synthesize, implement, build, or compile an FPGA design. Also handles project creation, checkpoint management, and run orchestration.

2026-04-223

vivado-constraints

devansh0703/vivaclaw-agent

Author and audit Vivado XDC constraint files. Use when creating constraints, finding unconstrained paths, debugging timing exceptions, checking clock definitions, or auditing I/O delays for completeness.

2026-04-223

vivado-debug

devansh0703/vivaclaw-agent

Insert ILA and VIO debug cores into a Vivado design. Use when asked to add hardware debug probes, set up ILA trigger conditions, insert VIO for stimulus injection, or generate .ltx probeinfo files.

2026-04-223

vivado-floorplan

devansh0703/vivaclaw-agent

Create Pblock floorplan constraints in Vivado. Use when dealing with placement congestion, SSI multi-die devices, reconfigurable partitions (DFX), or when critical paths need physical locality.

2026-04-223

vivado-flow

devansh0703/vivaclaw-agent

Run a complete Vivado design flow: project creation, synthesis, implementation, bitstream. Use when asked to build, synthesize, implement, or compile an FPGA design from RTL sources.

2026-04-223

vivado-impl

devansh0703/vivaclaw-agent

Run Vivado implementation phases: opt_design, place_design, phys_opt_design, route_design. Use when asked to run implementation, choose implementation directives, or re-run specific implementation phases.

2026-04-223

name	vivado-cdc
version	1.0.0
description	Analyze and fix clock domain crossing violations. Use when CDC violations appear, when auditing multi-clock designs, or when reviewing set_false_path and set_max_delay exceptions for safety.
metadata	{"openclaw":{"requires":{"bins":["vivado"]},"emoji":"🔀"}}

Vivado CDC Runbook

1. CDC Reporting

report_cdc -details -waived -file /tmp/vivaclaw_rpt/cdc_details.rpt
report_clock_interaction -delay_type min_max -significant_only -file /tmp/vivaclaw_rpt/clock_interaction.rpt

2. CDC Classifications & Fixes

Type	Classification	Action
A	Single-bit Control	2-FF Sync + `ASYNC_REG TRUE`
B	Multi-bit Data Bus	FIFO/Handshake ONLY. Review Required.
C	Gray Counter	`set_max_delay -datapath_only <period_dst>`
D	FIFO Crossing	Verify depth/flags sync.
E	MUX Static Path	`set_false_path` (Static signals only).
F	Reset Crossing	Async assert, Sync deassert.

3. Asynchronous Clock Groups

set_clock_groups -asynchronous \
  -group [get_clocks clk_a] \
  -group [get_clocks clk_b]

4. MTBF Analysis

report_synchronizer_mtbf -file /tmp/vivaclaw_rpt/mtbf.rpt

Target: >1e6 hours. If lower, increase sync chain depth to 3 FFs.

5. Waiver Protocol

Every waived path must include a reason: # CDC WAIVER | Type: <X> | Reason: <description> | Confirmed: VivaClaw