Authoring a per-module reference page under docs/markdown (RTLCommon/RTLMath/RTLAmba) - the local .md style (header table, Overview, Architecture, Top-level Interface, Data model, Timing, Related, Test) and the SV header block that mirrors it. Use whenever you add or change an RTL block and need its docs/markdown page, and keep the book index in sync.
What kind of documentation lives where in this repo - handbook (method) vs docs/markdown (reader-facing) vs vault/Tasks (work) vs beside-code (CLAUDE.md, PRD). The rule that a beside-code README is a link, never a standalone guide, and that style guides / how-tos never live in the RTL tree. Use before creating, moving, or "tidying" any .md file, and when reviewing an area's meta-docs.
Coverage methodology - Verilator line/toggle coverage per component, functional coverage expectations, and the monbus packet-type coverage matrix. Use when adding tests, closing coverage, or preparing a board-gate sign-off.
The Sherpa documentation pipeline - md_to_docx with --style, LoF/LoT/LoW caption encoding, book indexes, RTL PDF generation, HAS/MAS vs operator guides. Use before generating or restructuring any deliverable doc.
Filelist rules - EVERY module MUST have a .f and MUST be registered in bin/filelists.toml. Components own their compile closure, consumers -f include, never hand-list another area's sources. Use when adding ANY new RTL module, test, or .f file.
Formal verification flow - SymbiYosys via sv2v flatten, in-RTL ifdef FORMAL properties, mutation-checking every new assertion, harness vacuity traps. Use when writing properties, regenerating proofs, or after changing any module with a formal dir.
HARD RTL design guidelines - reset macros, CDC, valid/ready contracts, streaming no-FSM pattern, SRAM rules, sizing invariants, signal-naming audit. Use when writing or reviewing any RTL.
Signal-contracts + K-map workbooks (xlsx) for a component - contract sheets per interface and computed Karnaugh maps for key combinational decisions. Use when documenting or reviewing decision logic in engines/schedulers/arbiters.