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Run FPGA synthesis pipeline from .tri spec to bitstream. Use when working with Verilog, FPGA, or hardware synthesis.
Codex 또는 Claude로 설치 이 Prompt를 복사해 Codex, Claude 또는 다른 어시스턴트에 붙여 넣으면 Skill 페이지를 검토하고 설치를 진행할 수 있습니다.
SOC 직업 분류 기준
| name | fpga-synth |
| description | Run FPGA synthesis pipeline from .tri spec to bitstream. Use when working with Verilog, FPGA, or hardware synthesis. |
| argument-hint | <spec.tri or module-name> |
!git diff --name-only HEAD -- fpga/openxc7-synth/ 2>/dev/null | head -20
!ls -la /Users/playra/trinity-w1/fpga/openxc7-synth/*.bit 2>/dev/null
Run the FPGA synthesis pipeline for: $ARGUMENTS
zig build vibee -- gen $ARGUMENTScd fpga/openxc7-synth && makefpga/openxc7-synth/Makefile, fpga/openxc7-synth/synth_beal.tclfpga/openxc7-synth/*.xdcfpga/openxc7-synth/*.bit, *.fasm, *.framesTrinity Bridge manual — architecture, endpoints, commands, patterns for Perplexity-Railway-Mac-Claude Code channel. Reference for all AI agents.
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