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AMD ROCm/CDNA3 tuning: MI300X topology, LDS/L2, wavefront-64 and Triton num_warps, MFMA, HIP/Triton limitations, rocprof counters, and coalescing. Use when optimizing for gfx942/MI300 or comparing against NVIDIA H100 baselines.
Codex 또는 Claude로 설치 이 Prompt를 복사해 Codex, Claude 또는 다른 어시스턴트에 붙여 넣으면 Skill 페이지를 검토하고 설치를 진행할 수 있습니다.
SOC 직업 분류 기준
Optimize fused cross-entropy loss kernels in Triton for NVIDIA and AMD GPUs. Covers fused log-softmax + NLL, online log-sum-exp, and large vocabulary handling. Use when writing or optimizing cross-entropy, label-smoothed CE, or similar loss kernels.
Optimize FlashAttention-style fused attention kernels in Triton for NVIDIA and AMD GPUs. Covers online softmax, tiled QK/AV GEMM, causal masking, and memory-efficient attention. Use when writing or optimizing self-attention, cross-attention, or any QKV attention kernel.
Optimize dense matrix multiplication (GEMM) kernels in Triton for NVIDIA and AMD GPUs. Covers tiled blocking, L2 cache grouping, tensor core utilization, and dual-platform autotune. Use when writing or optimizing matmul, linear layers, or any GEMM-based kernel.
Optimize RMS Normalization kernels in Triton for NVIDIA and AMD GPUs. Covers row-parallel reduction, vectorized loads, warp shuffle patterns, and rsqrt usage. Use when writing or optimizing RMSNorm, LayerNorm, or similar normalization kernels.
Optimize Rotary Position Embedding (RoPE) kernels in Triton for NVIDIA and AMD GPUs. Covers interleaved/sequential layouts, sincos precomputation, and multi-row processing. Use when writing or optimizing RoPE, position embeddings, or rotary transformations.
Optimize fused softmax kernels in Triton for NVIDIA and AMD GPUs. Covers online max/sum reduction, multi-row processing, numerical stability, and warp-level patterns. Use when writing or optimizing softmax, log-softmax, or similar row-wise normalization kernels.
| name | gpu-opt-tier5-amd-rocm |
| description | AMD ROCm/CDNA3 tuning: MI300X topology, LDS/L2, wavefront-64 and Triton num_warps, MFMA, HIP/Triton limitations, rocprof counters, and coalescing. Use when optimizing for gfx942/MI300 or comparing against NVIDIA H100 baselines. |
AutoKernel Tier 5 vendor fork for ROCm and CDNA.
| Quantity | Typical class |
|---|---|
| CUs | 304 (full die class) |
| HBM bandwidth | ~5.3 TB/s (spec tier) |
| HBM capacity | 192 GB HBM3 class |
| LDS per CU | ~64 KB (architecture guidance) |
| L2 | ~256 MB shared |
num_warps=4 ⇒ 256 threads/block (common baseline).waves_per_euBLOCK_K (commonly 32 for FP16-class) and layouts that compilers can lower to matrix fragments.num_stages >= 1 on HIP (stage-0 patterns can fail).tl.math.tanh (and similar) may be missing or require polyfill—check Triton version and ROCm support matrix.| Aspect | H100 (Hopper) | MI300X (CDNA3) |
|---|---|---|
| Thread warp | 32 | 64 |
| Matrix API | WGMMA + TMA | MFMA |
| Peak BW / FLOPS | SKU-specific | HBM3 + MFMA class |
| Tools | NCU, NSYS | rocprof, ROCm SMI |
| Approximate FLOPS/BW class | H100 HBM3 + Hopper TC | 304 CU + 5.3 TB/s + MFMA class |
rocprof/rocprofv2 stats over static caps when advising “peak” percentages in diagnosis.rocminfo) and ROCm + Triton versions before promising intrinsics.BLOCK_K=32 prominent; tune num_warps on a 64-thread warp basis.waves_per_eu in the memory-vs-compute direction indicated by rocprof.