WORKFLOW SKILL — Execute board-level validation using JTAG-to-AXI for HLS IP hardware testing. USE FOR: connecting hardware; programming FPGA; starting HLS IP via ap_start; polling ap_done; reading output results. Essential for final hardware verification after synthesis. DO NOT USE FOR: simulation; synthesis; software testing.
WORKFLOW SKILL — Execute Vitis HLS C Synthesis and verify results. USE FOR: running v++ or vitis-run synthesis; checking Fmax/Latency metrics; proposing optimizations when targets not met; iterative refinement until metrics achieved. Ideal for FFT/SOCS high-performance kernels with Vitis 2025.2. DO NOT USE FOR: Vivado RTL synthesis; software simulation; board testing.
WORKFLOW SKILL — Execute complete Vitis HLS validation pipeline: C Simulation → C Synthesis → C/RTL Co-Simulation → Package. USE FOR: end-to-end functional and performance validation; verifying HLS kernels from simulation to deployable IP. Essential for FFT/SOCS kernels requiring Golden data comparison. DO NOT USE FOR: partial validation; board testing; Vivado synthesis.
WORKFLOW SKILL — Automatically progress through TODO tasks without user intervention. USE FOR: reading TODO documents; identifying current task status; executing next steps; updating task progress; chaining multiple tasks. Essential for autonomous development workflows. DO NOT USE FOR: single-step tasks; user-initiated specific operations.
WORKFLOW SKILL — Automatically capture and integrate development experiences into project constraints and skills. USE FOR: updating copilot-instructions.md; improving SKILL.md files; recording lessons learned; fixing outdated documentation; maintaining knowledge base. Essential for continuous improvement of AI assistance quality. DO NOT USE FOR: one-time tasks; user-specific preferences; temporary workarounds.
WORKFLOW SKILL — Generate HLS golden data for SOCS IP validation. USE FOR: running verification scripts; extracting tmpImgp_pad32.bin intermediate output; creating calcSOCS_reference CPU implementation. Essential for establishing HLS validation baseline. DO NOT USE FOR: HLS synthesis; board testing; production deployment.