proxy-fence-insertion

name	proxy-fence-insertion
description	Use when working on fence-related compiler passes, TMA store lowering, proxy fence insertion, investigating missing or spurious fences, or debugging correctness issues in TLX kernels that use tlx.async_descriptor_store or MMA operations.

Proxy Fence Insertion

Use when working on fence-related compiler passes, TMA store lowering, proxy fence insertion, investigating missing or spurious fences, or debugging correctness issue in TLX kernels that use tlx.async_descriptor_store or MMA operations.

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Why fences are needed

Hopper+ (sm90+) has separate generic and async memory proxies. Writes through one proxy are not visible to reads through the other without an explicit proxy fence (fence.proxy.async.shared::cta). For example, a register→SMEM store (generic proxy) followed by a TMA store from SMEM (async proxy) requires a fence between the two.

TLX DSL API

Source: third_party/tlx/language/tlx/mem_ops.py

tlx.fence(scope)

Unified fence entry point.

scope	PTX emitted	Use case
"async_shared"	fence.proxy.async.shared::cta	Bridge generic↔async proxy (e.g. between local_store and TMA store)
"gpu"	fence.acq_rel.gpu	Device-scope ordering of global/shared memory
"sys"	fence.acq_rel.sys	System-scope ordering (visible to host CPU)

tlx.fence_async_shared()

Deprecated alias for .