Deep integration with JTAG/SWD debug probes for hardware-level debugging and flash programming
原文语言:英语
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SkillsMP 已收集 a5c-ai/babysitter 中的 2,079 个 Skill。打开任一 Skill 可查看来源和详情。
a5c-ai/babysitter已展示 40 / 2,079 个已收集 Skill。
Deep integration with JTAG/SWD debug probes for hardware-level debugging and flash programming
原文语言:英语
GNU linker script generation and optimization for embedded systems. Expert skill for memory layout definition, section placement, multi-image linking, and memory protection configuration.
原文语言:英语
Embedded memory analysis, optimization, and leak detection
原文语言:英语
MISRA C compliance checking and static analysis integration
原文语言:英语
Motor control algorithms and driver implementation
原文语言:英语
Nordic Semiconductor nRF5x/nRF Connect SDK expertise
原文语言:英语
Over-the-air firmware update implementation expertise for embedded systems. Expert skill for delta updates, image signing, update protocols, partition management, and rollback mechanisms.
原文语言:英语
Power consumption measurement and analysis expertise for embedded systems. Integrates with power analyzer tools to measure, profile, and optimize power consumption in battery-powered and energy-efficient designs.
原文语言:英语
Serial protocol analysis and debugging for common embedded interfaces (I2C, SPI, UART)
原文语言:英语
Test equipment integration for signal analysis (oscilloscope and logic analyzer)
原文语言:英语
STMicroelectronics STM32 HAL and Low-Level driver expertise
原文语言:英语
Embedded unit testing with Unity framework and CMock
原文语言:英语
USB device and host stack implementation expertise
原文语言:英语
Embedded wireless protocol implementation (LoRa, Zigbee, Thread, Matter)
原文语言:英语
Specialized skill for Zephyr RTOS development and configuration
原文语言:英语
Expert skill for AMBA AXI protocol implementation and verification in FPGA designs
原文语言:英语
Specialized skill for clock domain crossing analysis and synchronizer design in FPGA designs
原文语言:英语
Formal property verification and model checking skill for FPGA designs
原文语言:英语
On-chip debugging skill with ILA, VIO, and related FPGA debug tools
原文语言:英语
Specialized skill for finite state machine design and optimization in FPGAs
原文语言:英语
Multi-simulator expertise for functional verification of FPGA designs
原文语言:英语
Expert skill for C/C++ to RTL conversion using High-Level Synthesis tools
原文语言:英语
Vendor IP core configuration and integration expertise for FPGA designs
原文语言:英语
Expert skill for on-chip and external memory interface design in FPGAs
原文语言:英语
Expert skill for FPGA place and route optimization and physical implementation
原文语言:英语
FPGA power estimation and optimization skill for low-power design
原文语言:英语
RTL code quality checking and linting. Runs lint rules, identifies synthesis issues, detects inferred latches, and generates lint reports with waivers.
原文语言:英语
Specialized skill for creating and debugging SystemVerilog assertions for FPGA verification
原文语言:英语
Expertise in RTL optimization for FPGA synthesis tools. Analyzes synthesis reports, applies attributes, and guides resource inference for optimal QoR.
原文语言:英语
Deep expertise in Universal Verification Methodology (IEEE 1800.2) for FPGA verification
原文语言:英语
Expert-level Verilog and SystemVerilog knowledge following IEEE 1800 standards. Generates synthesizable RTL code with proper coding styles and constructs.
原文语言:英语
Deep expertise in VHDL language constructs, IEEE 1076 standard compliance, and synthesis coding guidelines. Expert skill for generating synthesizable VHDL code.
原文语言:英语
Expert integration with NVIDIA GPU-accelerated math libraries. Configure cuBLAS tensor core operations, generate cuBLAS GEMM calls, integrate cuDNN layers, handle algorithm selection, and support mixed-precision operations.
原文语言:英语
Expert skill for GPU debugging using CUDA-GDB and NVIDIA Compute Sanitizer. Detect memory errors, race conditions, uninitialized memory access, validate atomic operations, analyze kernel synchronization issues, and generate debugging reports with…
原文语言:英语
Expert skill for CUDA Graph capture and optimization for reduced launch overhead. Capture CUDA operations into graphs, instantiate and execute graph instances, update graph node parameters, profile graph vs stream execution, design graph-friendly kernel…
原文语言:英语
Deep integration with NVIDIA CUDA toolkit for kernel development, compilation, and debugging. Execute nvcc compilation with optimization flags analysis, generate and validate CUDA kernel code, analyze PTX/SASS assembly output, and configure execution…
原文语言:英语
High-performance kernel template libraries and DSLs. Generate CUTLASS GEMM configurations, implement Triton kernel definitions, configure epilogue operations, tune tile sizes and warp arrangements, and benchmark against cuBLAS.
原文语言:英语
Expert skill for automated GPU performance benchmarking and regression detection. Design micro-benchmarks, measure kernel execution time with CUDA events, calculate achieved vs theoretical performance, generate comparison reports, detect regressions in CI/CD,…
原文语言:英语
Specialized skill for GPU memory hierarchy analysis and optimization. Analyze memory access patterns, detect bank conflicts, optimize cache utilization, profile global memory bandwidth, and generate optimized memory access code patterns.
原文语言:英语
AMD HIP and ROCm ecosystem for cross-platform GPU development. Execute hipify conversion tools, generate HIP-compatible kernel code, handle CUDA/HIP API differences, configure ROCm toolchain, and profile with rocprof.
原文语言:英语