菜单
Optimize Rotary Position Embedding (RoPE) kernels in Triton for NVIDIA and AMD GPUs. Covers interleaved/sequential layouts, sincos precomputation, and multi-row processing. Use when writing or optimizing RoPE, position embeddings, or rotary transformations.
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基于 SOC 职业分类
| name | rotary-embedding-kernel |
| description | Optimize Rotary Position Embedding (RoPE) kernels in Triton for NVIDIA and AMD GPUs. Covers interleaved/sequential layouts, sincos precomputation, and multi-row processing. Use when writing or optimizing RoPE, position embeddings, or rotary transformations. |
RoPE applies a rotation to pairs of elements: (x1, x2) -> (x1*cos - x2*sin, x1*sin + x2*cos).
Applied per-position in the sequence dimension.
RoPE is memory-bound (4 reads + 2 writes per pair, minimal compute). The key metric is GBps.
Two common layouts:
[x0, x1, x2, x3, ...] where pairs are (x0,x1), (x2,x3), ...[x_first_half | x_second_half] where pairs are (x[i], x[i+D/2])This template uses interleaved layout (common in LLaMA/GPT):
x1 = load(base + i*2), x2 = load(base + i*2 + 1)Process ROWS_PER_PROG rows per program for better occupancy on small head dims.
python skills/kernels/rotary-embedding/test_rotary.py
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