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YoloV8n-NPU
YoloV8n-NPU 收录了来自 lspaya05 的 4 个 skills，并提供仓库级职业覆盖和站内 skill 详情页。
这个仓库中的 skills
Generate a top-of-file header comment for a SystemVerilog file. Use when asked to add, write, or generate a file header/comment block. Analyzes the file and produces the standard EE470 format.
Architectural advice for the EE470 Neural Engine (KR260). Use for dataflow choice (WS/OS/RS), array sizing, quantization, memory hierarchy, AXI IP selection, or TPU/Eyeriss/NVDLA comparisons. Every claim cites a source.
Write SystemVerilog testbenches, UVM envs, SVA, or covergroups for the EE470 Neural Engine. Use for "testbench", "smoke test", "UVM", "scoreboard", "assertion", "coverage", or verifying a DUT. Obeys runlab.do naming contract.
Debug/review SystemVerilog RTL for the EE470 Neural Engine. Use for bug reports, sim/synth mismatches, latch inference, X-propagation, CDC, reset issues, DSP inference, QoR, or any RTL review. Cites IEEE 1800 LRM and Xilinx UGs.