electronic-bursting-neuron

name	electronic-bursting-neuron
description	Electronic bursting neuron hardware design using phase-locked loop (PLL) equations. Novel hybrid approach: start from phenomenological equations, adjust for circuit simplicity, then implement. Enables small neural circuit modeling with well-defined mathematical description.
license	Complete terms in LICENSE.txt
metadata	{"arxiv_id":"2607.02122","published":"2026-07-02","authors":"Lev V. Takaishvili, Vladimir I. Ponomarenko, Maksim V. Kornilov, Ilya V. Sysoev","tags":["electronic neuron","bursting neuron","phase-locked loop","neuromorphic hardware","spiking neural network","phenomenological modeling"]}

Electronic Bursting Neuron: Design, Equations and Hardware Implementation

Overview

Electronic neurons are fundamental building blocks for spiking neural networks (SNNs) with applications in neuroprosthetics, artificial memory, and intensive calculations. Existing designs suffer from three limitations: (1) too complex/expensive, (2) unable to demonstrate all required dynamical regimes, or (3) lack mathematical descriptions, requiring purely experimental investigation.

Paper: Electronic Bursting Neuron: design, equations and hardware implementation

arXiv: 2607.02122v1 (July 2, 2026)

Core Innovation: Hybrid Design Methodology

The paper proposes a novel hybrid approach to electronic neuron design:

1. Start from phenomenological equations that produce the desired bursting dynamics
2. Adjust and modify equations to simplify hardware implementation (rather than directly implementing biophysical equations or writing equations for an already-built circuit)
3. Build circuit that matches the adjusted equations

This reverses the traditional design flow, prioritizing mathematical tractability + hardware simplicity over biophysical accuracy.

Phase-Locked Loop (PLL) Architecture

The bursting electronic neuron is constructed as a circuit implementation of phase-locked loop (PLL) system equations.

Key design principles:

• PLL-based architecture provides natural oscillatory dynamics
• Equations are adjusted for circuit simplicity, not biophysical fidelity
• The resulting circuit is well-matched to underlying equations
• Mathematical description enables analysis of both single neurons and small neural circuits

Applications

• SNN hardware accelerators: Building block for neuromorphic computing systems
• Neuroprosthetics: Implantable neural interfaces requiring bursting behavior
• Artificial memory: Bursting patterns as memory encoding primitives
• Small circuit modeling: Mathematical description enables analysis of neural microcircuits

Comparison with Existing Approaches

Approach	Mathematical Description	Hardware Complexity	Bursting Capability
Biophysical implementation	Yes	Very high	Limited
Circuit-first design	Often no	Variable	Experimentally verified
This work (hybrid)	Yes	Low	Full

Use When

• Designing neuromorphic hardware with bursting neuron requirements
• Building SNN accelerators with PLL-based oscillator neurons
• Analyzing small neural circuits with mathematical tractability
• Implementing hardware neurons with both equations and physical realization

Pitfalls

• Equation-circuit mismatch: The hybrid approach requires careful iteration between equation simplification and circuit design. Not all simplified equations map cleanly to circuits.
• Not biophysically accurate: This approach prioritizes hardware simplicity over biological realism. Not suitable for computational neuroscience studies requiring biological fidelity.
• Scalability unknown: Paper demonstrates single neuron and small circuits; large-scale network behavior remains to be validated.
• Activation Keywords: electronic neuron, bursting neuron, phase-locked loop, PLL neuron, neuromorphic hardware, phenomenological modeling, hybrid design, circuit implementation

References

• arXiv: 2607.02122v1
• Categories: cs.NE, nlin.CD, physics.bio-ph
• Related skill: memristive-signed-couplings-onn (oscillatory neural networks with memristive devices)