neuroring-multifpga-snn

name	neuroring-multifpga-snn
description	NeuroRing methodology for modular and scalable SNN accelerator based on multi-FPGA bidirectional ring topology and stream-dataflow architecture
version	1.0.0
author	Hermes Agent
created	2026-05-28T00:00:00.000Z
arxiv_id	2604.28059
tags	["snn","fpga","neuromorphic","accelerator","scalability","ring-topology","stream-dataflow","hardware"]
activation_keywords	["neuroring","snn accelerator","fpga snn","multi-fpga","ring topology","stream-dataflow","snn hardware","spiking neural network hardware"]

NeuroRing: Multi-FPGA SNN Accelerator

Overview

NeuroRing is a modular and scalable Spiking Neural Network (SNN) accelerator based on stream-dataflow architecture and bidirectional ring topology, implemented using High-Level Synthesis (HLS) on FPGAs. It addresses the critical challenge of large-scale SNN execution where sparse spike communication and synchronization dominate runtime.

Key Innovation

Bidirectional Ring Topology + Stream-Dataflow Architecture

• Modular single- and multi-FPGA deployment
• Compatible with existing SNN workflows (NEST simulator integration)
• Addresses sparse spike communication bottlenecks in large-scale SNNs
• Preserves key activity statistics of reference models

Technical Framework

Architecture Components

1. Ring Topology Design

   • Bidirectional ring communication pattern
   • Efficient spike routing between modules
   • Reduced communication latency and synchronization overhead

2. Stream-Dataflow Processing

   • Event-driven computation pipeline
   • Sparse spike handling optimization
   • Low-latency spike propagation

3. HLS Implementation

   • High-Level Synthesis on FPGAs
   • Hardware-efficient spike processing
   • Programmable and flexible architecture

4. NEST Simulator Integration

   • Compatible with existing neuroscience workflows
   • Validates against reference simulations
   • Preserves biological fidelity

Performance Metrics

Cortical Microcircuit Benchmark:

• Real-Time Factor (RTF): 0.83 (faster-than-real-time execution)
• Preserves key activity statistics
• Strong and weak scaling demonstrated

Energy Efficiency:

• Competitive efficiency on programmable FPGAs
• Suitable for both neuroscience simulation and event-driven applications

Applications

Neuroscience Simulation

• Large-scale brain network modeling
• Real-time neural dynamics simulation
• Cortical microcircuit experiments

Neuromorphic Computing

• Event-driven computation platforms
• Energy-efficient SNN deployment