sysml-physical-port-generator
Define SysML v2 physical port structures (connector { protocol { pin# } }) for hardware connectors (GPIO headers, mikroBUS, JST, etc.). Use when adding or modeling multi-pin connectors, breakout boards, development-kit headers, or custom PCBA interfaces in sysml-v2-models/libs/common/parts/hardware_ports.sysml. Changing published connector defs in libs/common often implies well-design or COTS—use sysml-part-reviewer when maturity or doc impact is unclear.
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- Repository
- chouswei/cursor-user-skills
- Last source activity
- July 30, 2026 at 16:17
- Detected SKILL.md language
- English
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