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pipeline-orchestration

Cross-domain loop orchestration for the chip design pipeline. Provides the fix_request protocol, iteration-cap logic, escalation templates, and dispatch patterns for routing verification/formal failures to the RTL orchestrator and back. Use when driving the closed-loop verification↔RTL feedback cycle.

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Source facts

Repository
hdl-tools/digital-chip-design-agents
Last source activity
July 28, 2026 at 11:22
Detected SKILL.md language
English
Stars
193
Forks
47

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