analog-kan-biosignal-flexible-electronics

name	analog-kan-biosignal-flexible-electronics
description	Analog Kolmogorov-Arnold Networks (AKANs) for low-power function approximation in flexible electronics. Hardware-software co-optimization with circuit-level error modeling during training and dual-level pruning. Targets wearable biosignal processing (EEG, ECG, EMG) with 55% area and 50% power savings. Use when: neuromorphic computing for biosignals, analog neural network hardware, flexible electronics, low-power function approximation, wearable neural inference, sensor calibration, logarithmic compression.
date_added	2026-06-30T00:00:00.000Z
arxiv_id	2606.27892
authors	["Paula Carolina Lozano Duarte","Georgios Zervakis","Mehdi Tahoori","Sani Nassif"]
categories	["cs.AR","cs.ET","cs.NE"]
venue	IEEE JETCAS (2026)
doi	10.1109/JETCAS.2026.3707339

Analog Kolmogorov-Arnold Networks for Low-Power Biosignal Processing

Paper Metadata

• arXiv ID: 2606.27892
• Published: 2026-06-26
• Categories: cs.AR (Hardware Architecture), cs.ET (Emerging Technologies), cs.NE (Neural and Evolutionary Computing)
• Venue: IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS)
• Authors: Paula Carolina Lozano Duarte, Georgios Zervakis, Mehdi Tahoori, Sani Nassif

Core Problem

Wearable devices and IoT sensors require on-sensor processing of biosignals (EEG, ECG, etc.) including:

• Nonlinear activation functions for neural network inference
• Sensor calibration curves (raw → physical units)
• Signal preprocessing (logarithmic compression, power operations)

These operations are computationally demanding in digital implementations, especially on Flexible Electronics (FE) platforms with strict area/power constraints.

Key Innovation: Analog KAN (AKAN)

Architecture

• Kolmogorov-Arnold Network variant designed for analog hardware
• Functions learned on learnable spline-based activation functions (KAN paradigm)
• Implemented in analog domain → eliminates ADC overhead
• Hardware-software co-optimization with circuit-level error modeling during training

Hardware-Software Co-Optimization Pipeline

1. Software Training → Circuit-level error injection during forward pass
2. Pruning at Software Level → Remove redundant spline parameters
3. Hardware Mapping → Physical circuit implementation with pruning
4. Hardware-level Pruning → Further area/power reduction
5. Accuracy Recovery → Pruning regularizes spline parameters (can IMPROVE accuracy)

Key Insight: Pruning as Regularization

Counterintuitively, pruning not only reduces hardware cost but improves approximation accuracy by regularizing spline parameters — preventing overfitting to hardware non-idealities.

Results

• Area savings: up to 55%, average ~30%
• Power savings: up to 50%, average ~30%
• Validated across multiple biosignal processing benchmarks
• Generalizable to various function approximation tasks

Neuroscience Relevance

Direct Applications

1. EEG signal preprocessing: On-sensor artifact removal, feature extraction
2. : Real-time arrhythmia detection at the sensor