hardware-aware-snn-design-space-exploration

name	hardware-aware-snn-design-space-exploration
description	Hardware-aware open-source simulation framework for mixed-signal spiking neural networks. Enables cross-layer design space exploration across neuron models (LIF, HH, AH), synaptic devices (floating-gate, ReRAM), and architectures. Reports accuracy alongside hardware metrics (area, power, quantization sensitivity) for neuromorphic computing at the edge.
tags	["spiking-neural-networks","neuromorphic-computing","hardware-aware-design","mixed-signal","edge-computing","design-space-exploration","PyTorch","LIF","Hodgkin-Huxley","ReRAM"]
related_skills	["snn-fpga-hardware-software-codesign","snn-mcu-fullfeature-edge","snn-performance-analysis","quantized-snn-hardware-optimization"]
source	arXiv:2607.06456v1
date	2026-07-08T00:00:00.000Z

Hardware-Aware SNN Design Space Exploration

Paper Summary

Title: A Hardware-Aware Open-Source Framework for Design Space Exploration of Mixed-Signal Spiking Neural Networks
Authors: Sayma Nowshin Chowdhury, Vineeta Nair, Taseen Forhad, Aishwarya Natarajan, Corey Hart, Sahil Shah
arXiv: 2607.06456v1 (2026-07-07)
Categories: eess.SP, cs.NE

Core Methodology

Problem Statement

Energy-efficient neuromorphic computing at the edge requires simulation tools that:

1. Capture non-ideal behavior of mixed-signal SNN hardware
2. Support system-level design exploration
3. Enable comparative analysis across neuron, synapse, and architecture choices

Framework Architecture

Neuron Models Supported:

• Leaky Integrate-and-Fire (LIF) - simplest, most energy-efficient
• Hodgkin-Huxley (HH) - biologically detailed, higher fidelity
• Axon-Hillock (AH) - intermediate complexity

Synaptic Devices:

• Non-volatile analog synapses based on:
  • Floating-gate transistors
  • ReRAM (Resistive RAM) devices
• Incorporates device-level nonlinearities directly into training

Key Innovation: Optimizes physical synaptic parameters rather than idealized abstract weights, enabling true hardware-aware training.

Integration with PyTorch

The framework integrates device-level non-idealities directly into PyTorch-based training and inference pipelines. This allows:

• End-to-end training with hardware constraints
• Gradient-based optimization of physical parameters
• Seamless transition from simulation to deployment

Evaluation Benchmarks

Standard neuromorphic benchmarks:

• N-MNIST: Neuromorphic MNIST dataset
• DVS Gesture: Dynamic Vision Sensor gesture recognition
• Spiking Heidelberg Digits (SHD): Audio spike train classification

Hardware Metrics Reported

For each model-dataset configuration:

1. Classification Accuracy: Standard ML metric
2. Silicon Area: Physical footprint estimation
3. Power Consumption: Energy efficiency metrics
4. Quantization Sensitivity: Robustness to low-precision arithmetic

Practical Applications

Use Cases

1. Edge Device Design: Select optimal neuron-synapse configurations for specific accuracy-energy-area constraints
2. Algorithm-Hardware Co-design: Explore trade-offs between biological fidelity and hardware efficiency
3. Technology Comparison: Compare floating-gate vs ReRAM synapses for specific applications
4. Quantization Strategy: Determine optimal precision requirements for deployment

Design Space Exploration Workflow

1. Define application constraints (accuracy, energy, area)
2. Select neuron model (LIF/HH/AH) based on fidelity requirements
3. Choose synaptic device (floating-gate/ReRAM) based on non-volatility needs
4. Train with hardware-aware loss function
5. Evaluate across all metrics
6. Iterate to find Pareto-optimal configurations

Implementation Patterns

PyTorch Integration

# Pseudo-code pattern for hardware-aware SNN training
import torch
from hardware_snn_framework import NeuronModel, SynapseDevice, SNNLayer

# Configure hardware-aware components
neuron = NeuronModel('LIF', tau_mem=20e-3, v_threshold=1.0)
synapse = SynapseDevice('ReRAM', nonlinearity='exponential', retention=1e4)

# Build hardware-aware layer
layer = SNNLayer(neuron, synapse, in_features=784, out_features=128)

# Training with hardware constraints
optimizer = torch.optim.Adam(layer.parameters(), lr=1e-3)
for epoch in range(100):
    output = layer(input_spikes)
    loss = criterion(output, targets)
    loss.backward()
    optimizer.step()
    
    # Report hardware metrics
    report_metrics(layer, metrics=['accuracy', 'area', 'power', 'quantization'])

Cross-Layer Optimization

The framework enables optimization across multiple abstraction levels:

• Device level: Synaptic device parameters (conductance, retention, nonlinearity)
• Circuit level: Neuron dynamics (time constants, thresholds)
• System level: Network architecture (connectivity, layer depth)

Key Insights

1. Physical Parameters > Abstract Weights: Optimizing physical synaptic parameters (conductance states) rather than abstract weights leads to more deployable models
2. Nonlinearity Matters: Device-level nonlinearities significantly impact accuracy - ignoring them during training causes deployment failures
3. Multi-Objective Trade-offs: No single configuration dominates - LIF+ReRAM may optimize energy, while HH+floating-gate may optimize accuracy
4. Quantization Sensitivity Varies: Different neuron-synapse combinations have different robustness to low-precision arithmetic

Limitations & Future Work

Current Limitations:

• Focuses on feedforward architectures (no recurrent connections yet)
• Limited to specific device models (floating-gate, ReRAM)
• Does not model thermal effects or aging

Future Directions:

• Extend to recurrent SNN architectures
• Add more synaptic device models (PCM, MRAM)
• Incorporate temporal drift and aging models
• Support multi-chip systems

Activation Triggers

Use this skill when working on:

• Neuromorphic hardware design and simulation
• Edge AI deployment with strict energy/area constraints
• SNN training with hardware-aware objectives
• Device-circuit-algorithm co-design
• Mixed-signal neural network optimization

Related Resources

• Framework Repository: [Check paper for GitHub link]
• Neuromorphic Datasets: N-MNIST, DVS Gesture, SHD
• PyTorch SNN Libraries: snnTorch, SpikingJelly