| name | inhibitory-neuristor-mit |
| description | Inhibitory neuristor based on metal-insulator transition. VO2-based inhibitory neuron for balanced neuromorphic computing. Activation: inhibitory neuristor, metal-insulator transition, VO2 neuron, balanced spiking. |
Inhibitory Neuristor Based on Metal-Insulator Transition
Mimicking inhibitory behaviors of biological neurons using VO2-based metal-insulator transition devices for balanced neuromorphic computing.
Metadata
- Source: arXiv:2604.19951
- Authors: Victor Palin, Akash Agnihotri, Nareg Ghazikhanian, et al.
- Published: 2026-04-21
- Category: cond-mat.mtrl-sci, cs.ET
Core Methodology
Challenge
Mimicking the collective excitatory AND inhibitory behaviors of biological neurons remains critical for neuromorphic computing:
- Most implementations focus on excitatory dynamics
- Inhibition is crucial for network stability and selectivity
- CMOS-based inhibition is area and power inefficient
Solution: VO2-Based Inhibitory Neuristor
A single device that provides:
- Intrinsic inhibition: Natural suppressive behavior
- Compact implementation: No external circuitry needed
- Energy efficiency: Phase-transition dynamics
- Biological realism: Memristive analog to ion channels
Technical Framework
1. Device Physics
VO2 Metal-Insulator Transition:
- Insulating State: High resistance (MΩ range)
- Metallic State: Low resistance (kΩ range)
- Transition: First-order phase change
- Hysteresis: Memory of previous state
- Temperature control: Joule heating modulation
2. Inhibitory Mechanism
inhibitory_mechanisms = {
"shunting": "Parallel conductance increase",
"hyperpolarization": "Effective membrane potential decrease",
"refractory_extension": "Prolonged non-responsive period",
"gain_modulation": "Division of excitatory inputs"
}
3. Circuit Implementation
Inhibitory Neuristor Circuit:
Input (Excitatory)
│
▼
┌─────────────┐
│ VO2 │◄── Inhibitory Control
│ Neuristor │
└──────┬──────┘
│
▼
Output (Spike/No Spike)
Control Methods:
1. Series Resistance: Current limiting
2. Parallel Capacitance: Timing control
3. Bias Voltage: Operating point tuning
4. Temperature: Transition threshold
Implementation Guide
Device Fabrication
fabrication_steps = {
"1_substrate": "Si/SiO2, clean surface",
"2_vo2_deposition": "PLD or sputtering, 50-200 nm",
"3_patterning": "E-beam lithography, device definition",
"4_contacts": "Ti/Au evaporation, 50/100 nm",
"5_passivation": "Al2O3 or HfO2 encapsulation",
"6_testing": "Electrical characterization"
}
Operating Modes
Mode 1: Direct Inhibition
class DirectInhibitoryNeuristor:
"""
Direct shunting inhibition
"""
def __init__(self, threshold_current=50e-6):
self.I_th = threshold_current
self.state = 'insulating'
self.resistance = 1e6
def apply_inhibition(self, I_inh):
"""
Apply inhibitory current
"""
if I_inh > self.I_th:
self.state = 'metallic'
self.resistance = 1e3
return True
else:
self.state = 'insulating'
self.resistance = 1e6
return False
def compute_membrane(self, I_exc, I_inh):
"""
Compute effective membrane response
"""
self.apply_inhibition(I_inh)
V_membrane = I_exc * self.resistance
V_membrane
Mode 2: Gain Modulation
class GainModulationNeuristor:
"""
Divisive gain control
"""
def __init__(self, gain_factor=1.0):
self.gain = gain_factor
self.inhibition_level = 0.0
def update_inhibition(self, I_inh):
"""
Update inhibition level based on input
"""
self.inhibition_level = np.tanh(I_inh / 100e-6)
self.gain = 1.0 / (1.0 + self.inhibition_level)
def output(self, I_exc, I_inh):
"""
Compute divisive output
"""
self.update_inhibition(I_inh)
effective_input = I_exc * self.gain
if effective_input > 50e-6:
return 1
return 0
Mode 3: Temporal Dynamics
class TemporalInhibitoryNeuristor:
"""
Time-dependent inhibition with memory
"""
def __init__(self, tau_inh=10e-3):
self.tau = tau_inh
self.inhibition_charge = 0.0
self.threshold = 1.0
def update(self, I_inh, dt):
"""
Update inhibition state
"""
self.inhibition_charge += I_inh * dt / self.tau
self.inhibition_charge *= np.exp(-dt / self.tau)
inhibitory_active = self.inhibition_charge > self.threshold
return inhibitory_active
def refractory_period(self, spike_time):
"""
Extend refractory period via inhibition
"""
time_since_spike = current_time - spike_time
if time_since_spike < self.tau:
return True
return False
Network Integration
class BalancedNeuristorNetwork:
"""
Network with both excitatory and inhibitory neuristors
"""
def __init__(self, n_excitatory, n_inhibitory):
self.n_e = n_excitatory
self.n_i = n_inhibitory
self.exc_neurons = [VO2Neuristor() for _ in range(n_excitatory)]
self.inh_neurons = [InhibitoryNeuristor() for _ in range(n_inhibitory)]
self.W_ee = np.random.rand(n_excitatory, n_excitatory) * 0.1
self.W_ei = np.random.rand(n_inhibitory, n_excitatory) * 0.5
self.W_ie = np.random.rand(n_excitatory, n_inhibitory) * 0.3
def simulate_step(self, external_input):
"""
One timestep of network dynamics
"""
exc_input = (self.W_ee @ self.exc_spikes +
self.W_ie @ self.inh_spikes +
external_input)
inh_input = self.W_ei @ self.exc_spikes
self.exc_spikes = [n.update(exc_input[i])
i, n (.exc_neurons)]
.inh_spikes = [n.update(inh_input[i])
i, n (.inh_neurons)]
.exc_spikes, .inh_spikes
Applications
1. Balanced Neural Networks
- E/I Balance: Stable asynchronous activity
- Gain Control: Dynamic range optimization
- Selectivity: Sharper tuning curves
- Noise Robustness: Stochastic resonance
2. Pattern Recognition
- Competitive Learning: Winner-take-all dynamics
- Feature Binding: Synchronization control
- Attention Mechanisms: Gating and modulation
- Contrast Enhancement: Lateral inhibition
3. Oscillatory Dynamics
- Rhythm Generation: Pacemaker circuits
- Phase Control: Synchronization modulation
- Frequency Tuning: Band-pass filtering
- Resonance: Selective amplification
Performance Characteristics
Device Metrics
| Parameter | Value | Comparison |
|---|
| Switching Energy | ~10 fJ | 1000× lower than CMOS |
| Response Time | < 1 ns | Ultrafast inhibition |
| Footprint | < 100 nm² | Compact integration |
| Endurance | > 10^9 cycles | Long-term stability |
Network Benefits
- Power Reduction: 90% vs. CMOS implementation
- Area Savings: 50% reduction in synapse area
- Speed: 10× faster network dynamics
- Scalability: Dense 3D integration possible
Challenges
Device-Level
- Variability: Cycle-to-cycle reproducibility
- Temperature Sensitivity: Thermal management
- Endurance: Long-term reliability
- Integration: CMOS process compatibility
Circuit-Level
- Matching: Device-to-device uniformity
- Tuning: Operating point optimization
- Cross-talk: Electrical isolation
- Testing: Characterization complexity
Related Skills
neuromorphic-continual-nuclear-ics
spiking-neural-network-analysis
vo2-mott-oscillator-spiking-neurons
circuit-level-spiking-neuron-robustness
References
- Palin, V. et al. (2026). Inhibitory neuristor based on metal-to-insulator transition. arXiv:2604.19951.
- Pickett, M.D. & Williams, R.S. (2012). Sub-100 fJ and sub-100 ns electrical switching in NbO2.
- Stoliar, P. et al. (2017). A leaky-integrate-and-fire neuron analog realized with a Mott insulator.
Implementation Status