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Quick release pipeline — generate, verify, export gerbers, copy to release folder (no git commit)
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Based on SOC occupation classification
Full PCB verification loop using local kicad-cli (DRC + 3D render + gerbers)
Create a new Claude Code skill for this project. Use when you need to add a new skill, improve an existing skill, or convert a workflow into a reusable skill.
Verifies that every PCB pad-to-net assignment matches the manufacturer datasheet pin specifications. Use when changing board.py/routing.py/footprints.py, after GPIO remapping, before releases, or when adding new components. Automated guard against wiring errors like unconnected VBUS, wrong pin assignments, or missing GND connections.
Design intent adversary — cross-checks GPIO, nets, power chains, signal paths across firmware/schematic/PCB/datasheet sources to find lost connections and inconsistencies
Analyze a DFM report and fix all issues in the PCB generation scripts
Run DFM guard tests and add new regression tests after fixing PCB issues
| name | release-prep |
| model | claude-opus-4-7 |
| description | Quick release pipeline — generate, verify, export gerbers, copy to release folder (no git commit) |
| disable-model-invocation | true |
| allowed-tools | Bash, Read, Grep, Glob |
Fast release preparation without git commit or version notes. Use /release for full versioned releases.
cd /Users/pierrejonnycau/Documents/WORKS/esp32-emu-turbo
python3 -m scripts.generate_pcb hardware/kicad
python3 scripts/verify_dfm_v2.py
python3 scripts/verify_trace_through_pad.py
python3 scripts/verify_net_connectivity.py
If any test FAILS, stop and report. Do NOT continue to gerber export with failing tests.
verify_trace_through_pad.py is a hard gate against the v3.3 regression
class: a netted trace physically running through an unnetted pad creates
a real short on the fabricated board that DFM and DRC do not both catch
when pad net assignments are missing. Any failure here means a missing
entry in scripts/generate_pcb/routing.py::_PAD_NETS.
./scripts/export-gerbers-fast.sh
If Docker/OrbStack is not available, skip this step and note it in the summary.
cp hardware/kicad/jlcpcb/bom.csv release_jlcpcb/bom.csv
cp hardware/kicad/jlcpcb/cpl.csv release_jlcpcb/cpl.csv
rm -rf release_jlcpcb/gerbers
cp -r hardware/kicad/gerbers release_jlcpcb/gerbers
cp hardware/kicad/jlcpcb/gerbers.zip release_jlcpcb/gerbers.zip 2>/dev/null || true
python3 scripts/verify_dfa.py
If any test FAILS, stop and report. Assembly issues must be fixed before release.
| Step | Status | Detail |
|---|---|---|
| PCB generation | OK/FAIL | — |
| DFM tests (64) | X/Y pass | list failures |
| DFA tests (9) | X/Y pass | list failures |
| Gerber export | OK/SKIP | OrbStack required |
| Release copy | OK/FAIL | — |
Next steps: If all OK, use /release <version> to create a versioned release with git commit.
release_jlcpcb/ — Output directoryrelease_jlcpcb/bom.csv — Bill of Materialsrelease_jlcpcb/cpl.csv — Component Placement Listrelease_jlcpcb/gerbers/ — Gerber files