esp32-emu-turbo

Full PCB verification loop using local kicad-cli (DRC + 3D render + gerbers)

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Verifies that every PCB pad-to-net assignment matches the manufacturer datasheet pin specifications. Use when changing board.py/routing.py/footprints.py, after GPIO remapping, before releases, or when adding new components. Automated guard against wiring errors like unconnected VBUS, wrong pin assignments, or missing GND connections.

Design intent adversary — cross-checks GPIO, nets, power chains, signal paths across firmware/schematic/PCB/datasheet sources to find lost connections and inconsistencies

Analyze a DFM report and fix all issues in the PCB generation scripts

Run DFM guard tests and add new regression tests after fixing PCB issues

Scan all documentation against source-of-truth files (config.py, board_config.h, routing.py, BOM, PCB) and report/fix outdated values. Use after PCB changes, GPIO remapping, BOM updates, or before releases.

Full KiCad DRC audit — catches net shorts, unconnected pads, dangling vias, and clearance violations that custom scripts miss

Run native KiCad DRC with smart violation filtering, delta tracking, and fix suggestions

Comprehensive electrical verification — strapping pins, decoupling adequacy, power sequencing, SPICE simulation, and 30-question manual checklist

Design and modify the OpenSCAD parametric enclosure for the handheld console

Export OpenSCAD enclosure parts to STL files for 3D printing

Render OpenSCAD enclosure views to PNG via Docker

Run external DFM analysis using KiBot (DRC/ERC/design report) and Tracespace (gerber validation) via Docker. Use after internal verify passes to get a second opinion from third-party tools.

Build, flash, and test ESP-IDF firmware for ESP32-S3 (via Docker or native)

Verify GPIO pin assignments match between firmware (board_config.h) and schematic (config.py)

Investigate and fix JLCPCB CPL rotation for a component using mathematical pin alignment analysis

Complete release pipeline — all verifications, 3D PCBA renders, SVG renders, gerber export, BOM/CPL, and release_jlcpcb/ sync. Use after PCB changes to prepare a production-ready JLCPCB package with documentation renders.

Run the full PCB generation pipeline (generate + zone fill + gerbers + release package)

Deep electrical/functional audit of the ESP32 Emu Turbo hardware design. Finds bugs that prevent power-on, component operation, or emulator functionality. Cross-checks schematics, PCB, datasheets, and firmware via automated gates + manual domain-by-domain review.

Generate ESP-IDF Unity test firmware for prototype board validation. Run after PCB assembly to verify all GPIOs, buses, and peripherals work correctly.

Verify JLCPCB pick-and-place alignment for all bottom-side ICs and connectors. Checks CPL rotation, position corrections, and pin-to-net assignments. Use before any JLCPCB PCBA order or after changing CPL/rotation/position parameters.

Investigate JLCPCB 3D model alignment for a component (rotation, position, pin mapping)

Search JLCPCB/LCSC parts catalog and check BOM component availability

Run comprehensive JLCPCB DFM validation — drill rules, edge clearances, copper checks, NPTH, silkscreen, gerber completeness, and best practices. Use after PCB changes, before JLCPCB upload, or when investigating manufacturing rejections.

Analyze pad-to-pad distances to detect spacing violations before DFM upload

Board setup operations — dimensions, outline, layers, mounting holes, text (KiCAD MCP tools 5-13)

Component placement operations — place, move, rotate, align, array (KiCAD MCP tools 14-23)

Footprint library management — search, list, inspect footprint details (KiCAD MCP tools 32-35)

Analyze PCB layout and suggest optimizations (traces, copper balance, thermal, vias)

Comprehensive PCB design review — 8 domains, 100-point scoring, JLCPCB DFM rules, datasheet pin verification

Trace routing operations — route, via, differential pair, copper pour, net classes (KiCAD MCP tools 24-31)

Schematic design operations — create, edit, wire, net labels, export (KiCAD MCP tools 50-58)

Auto-propagate PCB/routing changes to firmware (board_config.h), docs, and config files. Run after any GPIO remapping, component change, or routing modification. Detects diffs, applies fixes, verifies consistency.

Generate photorealistic 3D PCBA renders using KiCad raytracer. Produces top, bottom, isometric, and detail views at 1920x1080 with floor reflections and studio lighting. Use after PCB changes, for documentation, or manufacturing review.

Resume a failed PCB pipeline from the last successful checkpoint

Quick release pipeline — generate, verify, export gerbers, copy to release folder (no git commit)

Prepare a complete JLCPCB release package with version notes

Run the Docker rendering pipeline (schematics, PCB, enclosure)

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