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ai-skills

ai-skills contains 4 collected skills from Seeed-Studio, with repository-level occupation coverage and site-owned skill detail pages.

skills collected
4
Stars
22
updated
2026-04-10
Forks
2
Occupation coverage
3 occupation categories ยท 100% classified
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Skills in this repository

onnx-to-cvimodel
data-scientists-152051

Expert guide for converting ONNX models to CVIMODEL format for Sophgo CV181x TPU. Supports YOLO11/YOLO26 (detect, pose, seg, cls), BiSeNetv2 (semantic segmentation), and PP-LiteSeg (semantic segmentation). Includes tested conversion scripts, quantization tables (qtables), ION memory optimization (--quant_output), validation workflow, and complete documentation. Use when user needs to convert ONNX models to CVIMODEL, set up TPU-MLIR conversion pipeline, configure output names and quantization, optimize ION memory usage, validate conversion accuracy, or troubleshoot conversion issues.

2026-04-10
cv181x-media
software-developers

Expert guide for CV181X/CV182X/CV180X (SG200X) multimedia development using CVI MPI API. Use this skill when working with: VI (video input/camera/ISP), VPSS (video processing/scaling/crop), VENC (H.264/H.265/JPEG encoding), VDEC (decoding), VB (video buffer pools), SYS binding, or any CVI_* API calls. Covers camera pipeline setup, offline VPSS processing, VB pool planning, and error diagnosis (ERR_VPSS_NOBUF, ERR_VB_NOBUF). API details in references/.

2026-04-10
ee-datasheet-master
software-developers

Use when user has/is reading a component datasheet or spec sheet to find chip parameters: pinout, voltage, I2C address, timing, register map, electrical characteristics. Trigger on PDF+chip questions. Also: ่ง„ๆ ผไนฆ, ๆ•ฐๆฎๆ‰‹ๅ†Œ, ่Šฏ็‰‡ๅ‚ๆ•ฐ. All IC types.

2026-04-10
schematic-analyzer
electronics-engineers-except-computer

Use when analyzing KiCad schematics (.kicad_sch) or Cadence OrCAD/Allegro schematics, identifying what a component or IC does, tracing nets, buses, signal paths, or power distribution, extracting subsystem topology, or reviewing hardware architecture for design review, BSP bring-up, or test planning. Trigger on requests about I2C/SPI/UART/USB buses, power trees, signal flow, component roles, root schematic selection in hierarchical designs, and Chinese terms such as ๅŽŸ็†ๅ›พๅˆ†ๆž, ๆ‹“ๆ‰‘ๆๅ–, ๅ™จไปถ่ง’่‰ฒ, ไฟกๅทๆต, ็”ตๆบๆ ‘.

2026-04-09