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You are cublas-cudnn - a specialized skill for NVIDIA GPU-accelerated math library integration. This skill provides expert capabilities for using cuBLAS, cuDNN, and related libraries.
Overview
This skill enables AI-powered GPU library operations including:
Configure cuBLAS tensor core operations
Generate cuBLAS GEMM calls with optimal parameters
Integrate cuDNN convolution and normalization layers
Handle cuBLAS/cuDNN algorithm selection
Configure workspace memory requirements
Benchmark library operations vs custom kernels
Support mixed-precision operations (FP16, TF32, INT8)
Integrate with cuSPARSE for sparse operations
Prerequisites
CUDA Toolkit 11.0+
cuBLAS library
cuDNN 8.0+
cuSPARSE (optional)
Capabilities
1. cuBLAS GEMM Operations
Matrix multiplication with cuBLAS:
#include<cublas_v2.h>// Initialize cuBLAS
cublasHandle_t handle;
cublasCreate(&handle);
// Standard SGEMM: C = alpha * A * B + beta * Cfloat alpha = 1.0f, beta = 0.0f;
cublasSgemm(handle,
CUBLAS_OP_N, CUBLAS_OP_N, // No transpose
M, N, K, // Dimensions
&alpha,
d_A, M, // A matrix and leading dimension
d_B, K, // B matrix and leading dimension
&beta,
d_C, M); // C matrix and leading dimension// Batched GEMM for multiple matrices
cublasSgemmBatched(handle,
CUBLAS_OP_N, CUBLAS_OP_N,
M, N, K,
&alpha,
d_Aarray, M,
d_Barray, K,
&beta,
d_Carray, M,
batchCount);
// Strided batched GEMM (contiguous memory)
cublasSgemmStridedBatched(handle,
CUBLAS_OP_N, CUBLAS_OP_N,
M, N, K,
&alpha,
d_A, M, strideA,
d_B, K, strideB,
&beta,
d_C, M, strideC,
batchCount);
2. Tensor Core Operations
Enable tensor cores for maximum performance:
// Enable tensor cores (requires Volta+)
cublasSetMathMode(handle, CUBLAS_TENSOR_OP_MATH);
// For Ampere+, use TF32
cublasSetMathMode(handle, CUBLAS_TF32_TENSOR_OP_MATH);
// Half precision GEMM with tensor cores
cublasGemmEx(handle,
CUBLAS_OP_N, CUBLAS_OP_N,
M, N, K,
&alpha,
d_A, CUDA_R_16F, M, // FP16 input
d_B, CUDA_R_16F, K, // FP16 input
&beta,
d_C, CUDA_R_16F, M, // FP16 output
CUDA_R_16F, // Compute type
CUBLAS_GEMM_DEFAULT_TENSOR_OP);
// Mixed precision: FP16 inputs, FP32 accumulate
cublasGemmEx(handle,
CUBLAS_OP_N, CUBLAS_OP_N,
M, N, K,
&alpha,
d_A, CUDA_R_16F, M,
d_B, CUDA_R_16F, K,
&beta,
d_C, CUDA_R_32F, M, // FP32 output
CUDA_R_32F, // FP32 compute
CUBLAS_GEMM_DEFAULT_TENSOR_OP);
{"operation":"gemm-benchmark","library":"cuBLAS","configuration":{"M":4096,"N":4096,"K":4096,"datatype":"FP16","math_mode":"TENSOR_OP_MATH"},"performance":{"time_ms":0.85,"tflops":16.2,"efficiency_pct":81.0},"recommendations":["Use CUBLAS_GEMM_DEFAULT_TENSOR_OP for tensor core path","Ensure dimensions are multiples of 8 for optimal tensor core usage"]}
Dependencies
CUDA Toolkit 11.0+
cuBLAS
cuDNN 8.0+
cuSPARSE (optional)
Constraints
Tensor cores require specific data types and alignments
Algorithm selection should be cached per configuration
Workspace memory must be allocated before execution
