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Babel internal issue protocol — create a labeled handoff between pipeline agents. Writes designs/<name>/.handoff/<label>.md and appends to handoff_log.jsonl; best-effort gh issue create if gh available. Triggered by every guru/architect agent at handoff time.
Codex または Claude でインストール この Prompt をコピーして Codex、Claude、または他のアシスタントに貼り付けると、Skill ページを確認してインストールできます。
SOC 職業分類に基づく
| name | bb-create-issue |
| description | Babel internal issue protocol — create a labeled handoff between pipeline agents. Writes designs/<name>/.handoff/<label>.md and appends to handoff_log.jsonl; best-effort gh issue create if gh available. Triggered by every guru/architect agent at handoff time. |
--label <label> — one of ready-for-rtl | ready-for-verification | ready-for-synth | ready-for-pd | signoff | arch-needs-fix | rtl-needs-fix | synth-needs-fix | escalate-user | pd-rework--artifact <path> — canonical artifact path (e.g. designs/<name>/mas/mas.json)--body-file <path> (optional) — markdown body source--correlation-id <sha256> (optional) — sha256 of failing artifact for dedup (fix M-07)--design-name <name> (optional) — derived from artifact path if absent--summary <one-liner> (optional) — placed at top of body| field | 值 |
|---|---|
artifact_path | designs/<name>/.handoff/<label>.md |
log_path | designs/<name>/.handoff/handoff_log.jsonl |
gh_issue_url | URL|null |
valid | bool |
if --design-name absent:
parse from --artifact: matches "designs/([^/]+)/" → design_name
if no match: error "cannot derive design_name", exit 2
LLM 直接调 Write 工具写出 designs/<design_name>/.handoff/<label>.md：
# <label>
- timestamp: <ISO 8601 Beijing time>
- artifact: <path>
- correlation_id: <sha or NA>
- summary: <one-liner or "">
- body: <body-file content or stdin>
调 Bash：
mkdir -p designs/<design_name>/.handoff
LINE=$(printf '{"ts":"%s","label":"%s","artifact":"%s","correlation_id":"%s"}' \
"$(date -u +'%Y-%m-%dT%H:%M:%SZ')" "<label>" "<artifact>" "<correlation_id_or_NA>")
echo "$LINE" >> designs/<design_name>/.handoff/handoff_log.jsonl
if command -v gh >/dev/null 2>&1; then
gh issue create \
--label "<label>" \
--title "<label>: <design_name>" \
--body-file designs/<design_name>/.handoff/<label>.md \
2>/dev/null || true
fi
返回 {artifact_path, log_path, gh_issue_url|null, valid:true}。
{valid:false, error:"write failed"}写入 <label>.md 后由 bb-hook-pipeline-advance.sh 自动提示用户下一步 agent；写 *-needs-fix.md 由 bb-hook-create-fix-issue.sh 记录 escalation。
ready-for-rtl, ready-for-verification, ready-for-synth, ready-for-pd, signoff,
arch-needs-fix, rtl-needs-fix, synth-needs-fix, pd-rework, escalate-user
基于 AST 检查 CDC/RDC 违例：对比 MAS clock_domains 找跨域信号，检查是否被 2ff-sync CBB 保护。触发场景：(1) bba-guru-synthesis 综合前；(2) 显式 /bb-check-cdc。
调用 verible-verilog-lint 检查 SV 源码。src 必须可综合（零 syntax error），tb 允许 verification constructs。发现 src error 时自动修复重检（max 3 iter）。触发：(1) bba-guru-rtl 生成后；(2) RTL 修复重检；(3) 显式 /bb-check-lint。
解析 Verilator coverage.dat + sim log，输出 functional + code coverage 数值，判断是否 100% 达标。触发场景：(1) bb-invoke-verilator 后；(2) 每次回归后；(3) 显式 /bb-collect-coverage。
从 MAS（io_ring/pad_list/clock_plan）+ 综合网表生成 Magic floorplan TCL，交给 bb-invoke-magic 执行。触发场景：(1) bba-guru-pd 综合后做 floorplan；(2) DRC 失败后调整 utilization 重生成；(3) 显式 /bb-create-floorplan。
从 MAS（clock_domains / io_timing / path_exceptions）派生 Synopsys SDC 时序约束文件，OpenSTA 语法校验。触发场景：(1) bba-guru-synthesis 综合前；(2) post-PD timing fail 修订约束；(3) 显式 /bb-create-sdc。
扫描 RTL 目录提取模块层次依赖，拓扑排序后写 file_list.f（叶模块在前，top 在最后），供 Yosys/Verilator 使用。触发场景：(1) bba-guru-rtl 生成 RTL 后生成 file_list；(2) 显式 /bb-find-module-deps。