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Analyzes KiCad PCB files to identify power nets by looking up component datasheets via AI. Use when you need to determine which nets are power/ground nets and what track widths to use, especially when KiCad pintype annotations are missing or unreliable.
默认使用会先检查来源的 Prompt；你也可以切换为直接命令，或下载本地副本。
决定是否安装前，请先阅读 SKILL.md，以及 SkillsMP 当前展示的配套文件。
用 Codex 或 Claude 帮你安装 复制这段 Prompt，粘贴到 Codex、Claude 或其他助手里，让它检查 Skill 页面并帮你完成安装。
直接命令不会经过审查 Prompt；运行前请先检查来源。
npx skills add https://github.com/drandyhaas/KiCadRoutingTools --skill analyze-power-nets命令会保持在同一行。复制前请横向滚动并检查完整内容。
想先保存到本地？可下载 SkillsMP 当前能够提供的文件。
Analyses a KiCad PCB's PLACEMENT and produces a placement plan. Measures whether the board should be placed or re-placed at all and decides from that measurement, detects an unplaced board, separates the parts whose position is a mechanical fact from the ones a search may move, reconstructs a damaged placement (pattern fit, rigid vectors, exact assignment, minimal-move legalize), repairs local violations, offers a slate of arrangements, and grades the result against a declared floorplan intent. Never changes the board outline, and never routes.
Plans a KiCad PCB end to end when ONE run must both place and route it. Sequences the placement skill and the routing skill, and owns the rules that exist only when the two meet: that placement invalidates every downstream routed board, that a routing failure must be classified before it is retried, and that a placement-shaped failure re-enters placement rather than burning retries in the router. Use when the board needs both; use the individual skills when it needs one.
Analyzes a KiCad PCB file and creates a comprehensive routing plan. Examines components for fanout needs (BGA/QFN/QFP/PGA), identifies differential pairs, categorizes power/ground nets, and presents a step-by-step routing workflow with explanations.
基于 SOC 职业分类
正在显示 SKILL.md
| name | analyze-power-nets |
| description | Analyzes KiCad PCB files to identify power nets by looking up component datasheets via AI. Use when you need to determine which nets are power/ground nets and what track widths to use, especially when KiCad pintype annotations are missing or unreliable. |
When this skill is invoked, perform a full AI-powered analysis of the PCB to identify power nets and recommend track widths.
from analyze_power_paths import (
analyze_pcb, get_components_needing_analysis, classify_component,
trace_power_paths, get_power_net_recommendations, format_analysis_report,
ComponentRole
)
components, pcb_data = analyze_pcb("path/to/file.kicad_pcb")
unknown = get_components_needing_analysis(components)
These are already handled automatically - no AI needed:
| Prefix | Role | Reason |
|---|---|---|
| R (resistor) | SHUNT | Pull-ups, voltage dividers |
| C (capacitor) | SHUNT | Decoupling caps |
| L (inductor) | PASS_THROUGH | Series filter element |
| FB (ferrite bead) | PASS_THROUGH | Series filter element |
| F (fuse) | PASS_THROUGH | Series protection |
| LED | CURRENT_SINK | Consumes current |
| SW (switch) | PASS_THROUGH | Power switching |
For each component in the unknown list, you MUST:
Use WebSearch to look up the component:
WebSearch: "<part_value> <footprint_hint> datasheet"
Examples:
"DB9 connector pinout" - Is it signal or power?"1N4004 diode datasheet" - Rectifier vs signal diode"3906 transistor datasheet" - Power switch or signal amp?"LT1129 regulator datasheet" - Voltage regulator specs"MCF5213 power consumption" - IC current requirementsBased on the datasheet/search results, classify as:
| Role | Criteria |
|---|---|
| POWER_SOURCE | Supplies current to the board: power jacks, battery connectors, regulator outputs, USB power inputs |
| CURRENT_SINK | Consumes significant current: ICs, MCUs, CPLDs, FPGAs, motor drivers, high-power LEDs |
| PASS_THROUGH | Current flows through it: power switches, transistors used as switches, protection diodes in series |
| SHUNT | Branches off the power path: ESD protection diodes, TVS diodes, signal connectors |
From the datasheet, find:
classify_component(components, 'J201', ComponentRole.POWER_SOURCE,
current_rating_ma=1000,
notes="DC barrel jack - main power input")
Focus AI analysis on these component types:
After classifying all components:
paths = trace_power_paths(pcb_data, components)
recommendations = get_power_net_recommendations(pcb_data, components, paths)
print(format_analysis_report(pcb_data, components, paths, recommendations))
Provide the user with:
--power-nets command line argumentsWhen analyzing a board like kit-dev-coldfire-xilinx_5213:
## Power Net Analysis for board.kicad_pcb
### AI-Classified Components
| Ref | Value | Role | Current | Notes |
|-----|-------|------|---------|-------|
| J201 | JACK_2P | POWER_SOURCE | 1000mA | DC power input |
| U102 | MCF5213 | CURRENT_SINK | 200mA | ColdFire MCU |
### Power Paths Traced
TB201 (power input) → SW_ONOFF201 → F201 → VR201 → +3.3V → U102 (MCU)
### Recommended Power Nets
| Net | Width | Reason |
|-----|-------|--------|
| Net-(TB201-P1) | 0.5mm | Power input path |
| Net-(F201-Pad1) | 0.5mm | After fuse |
| +3.3V | 0.5mm | Main rail, 500mA total |
| /VDDPLL | 0.3mm | PLL supply, 10mA |
### Routing Command
--power-nets "GND" "+3.3V" "/VDDPLL" "/VCCA" "Net-(TB201-P1)" --power-nets-widths 0.5 0.5 0.3 0.3 0.5
/recommend-plane-mappings and /plan-pcb-routing decide which rails get
poured on which layers. Still pass ALL power nets in --power-nets with
these widths — and since #562 this matters MORE, not less: poured rails
now ride the route step too (--nets "*"), so these widths size their
pour-launch welds, the in-run finalize's taps, and any track segments the
chain draws for small rails not worth a pour. Never turn this
skill's width table into a reason to route a many-pad rail as tracks
instead of pouring it.