quantum-compiler-routing

name

quantum-compiler-routing

description

Quantum compiler qubit mapping and routing methodology for scalable quantum circuit compilation. Covers position graph abstraction, heuristic mapper optimization (SABRE), memoized congestion resolution, and architecture-aware compilation for heterogeneous quantum hardware including TI-QCCD (Trapped-Ion Quantum Charge-Coupled Device) systems. Use when: implementing quantum compilers, designing qubit mapping and routing algorithms, optimizing quantum circuit compilation for specific hardware architectures, analyzing compilation scalability bottlenecks, or working with shuttling-based trapped-ion or superconducting quantum architectures. Activation: quantum compiler, qubit mapping, qubit routing, SABRE algorithm, quantum circuit compilation, TI-QCCD, trapped-ion compilation, position graph abstraction, quantum shuttling, compiler scalability, memoized heuristic evaluation.

Quantum Compiler Qubit Mapping & Routing

Methodology for scalable qubit mapping and routing in quantum circuit compilation, based on position graph abstraction and memoized heuristic evaluation.

Core Problem

Quantum circuit compilation requires mapping logical qubits to physical qubits and routing interactions under hardware connectivity constraints. For shuttling-based architectures (TI-QCCD), additional constraints include:

• Physical ion movement requirements
• Trap capacity limits
• Congestion resolution during multi-qubit operations

Position Graph Abstraction

The position graph unifies three critical representations:

1. Executable locations: Where qubits can physically reside
2. Movement paths: Valid routes for qubit shuttling/swap operations
3. Routing constraints: Hardware-specific limitations (trap capacity, movement rules)

This abstraction enables heuristic mappers to operate directly on hardware-specific constraints without architecture-specific code changes.

Optimizing SABRE-Based Compilation