Place schematic components readably without overlap — use suggest_component_placement, add_component auto_place, or apply_schematic_layout_spec for batch JSON specs; keep parts upright (0° rotation), and follow workflow coordinate tables for complex circuits like buck converters.
Author, scaffold, build, and validate QSpice `.DLL` custom-device blocks for mixed-signal C/C++ models. Use when adding a controller or behavioral block backed by compiled code, generating a C++ scaffold from a symbol, building the DLL, or checking that a symbol matches its source.
Simulate and characterize switching power converters in QSpice. Use for buck/boost/SMPS work — staging transient and AC analyses, measuring efficiency and step response, and assessing loop gain, phase margin, and gain margin for stability.
Inspect, derive, and measure QSpice waveform results after a simulation. Use when reading signals from a `.qraw`, comparing nodes, computing derived expressions like V(out)-V(in), measuring RMS/peak/gain/THD, or exporting traces for further analysis.
Drive the QSpice MCP server end to end — discover or author a circuit, generate a netlist, run a simulation, and read or measure waveforms. Use when starting any QSpice task, when unsure which tool to call, when asked to simulate a circuit, build a buck/boost or other topology, inspect a .qsch, or read simulation results.
Diagnose and fix QSpice simulations that fail to converge, stop early, or produce no usable waveform. Use when a run errors, the log shows "no convergence", "timestep too small", singular-matrix, or gmin-stepping failures, or when V(out) is missing/flat after a simulation.