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Simulate and characterize switching power converters in QSpice. Use for buck/boost/SMPS work — staging transient and AC analyses, measuring efficiency and step response, and assessing loop gain, phase margin, and gain margin for stability.
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基于 SOC 职业分类
| name | qspice-power-electronics |
| description | Simulate and characterize switching power converters in QSpice. Use for buck/boost/SMPS work — staging transient and AC analyses, measuring efficiency and step response, and assessing loop gain, phase margin, and gain margin for stability. |
| license | MIT |
| metadata | {"author":"qspice-mcp","version":"1.0"} |
A workflow for switching converters (buck, boost, SMPS): get a working transient, then characterize efficiency, transient response, and control-loop stability.
qspice-convergence-debugging first.qspice-waveform-analysis.materialize_reference_circuit for a bundled starting point
(e.g. buck_converter_cpp), or author your own. inspect_schematic to confirm
topology; check_schematic for a conservative ERC pass (floating nets,
single-pin nets, missing ground) before spending sim time.prepare_transient to stage a .tran directive long
enough to reach steady state plus the events you care about, then
run_simulation.read_waveform on the switching node and output;
measure_step_response for rise time / overshoot / settling on a load or
reference step; measure_efficiency from input/output power traces.prepare_loop_gain_analysis (Tian or Middlebrook
injection) + prepare_ac, run, then measure_stability_margins for crossover
frequency, phase margin, and gain margin.| Metric | Tool | Sanity check |
|---|---|---|
| Regulation | read_waveform / measure_waveform | V(out) settles near target |
| Ripple | read_waveform | Output ripple within spec at steady state |
| Efficiency | measure_efficiency | Pout/Pin physical (<1), losses reasonable |
| Transient | measure_step_response | Bounded overshoot, settles, no sustained ring |
| Stability | measure_stability_margins | Phase margin typically ≥ 45°, positive gain margin |
check_schematic before long transient sweeps; a floating feedback node is
cheaper to catch statically than after a failed multi-second run.Place schematic components readably without overlap — use suggest_component_placement, add_component auto_place, or apply_schematic_layout_spec for batch JSON specs; keep parts upright (0° rotation), and follow workflow coordinate tables for complex circuits like buck converters.
Author, scaffold, build, and validate QSpice `.DLL` custom-device blocks for mixed-signal C/C++ models. Use when adding a controller or behavioral block backed by compiled code, generating a C++ scaffold from a symbol, building the DLL, or checking that a symbol matches its source.
Inspect, derive, and measure QSpice waveform results after a simulation. Use when reading signals from a `.qraw`, comparing nodes, computing derived expressions like V(out)-V(in), measuring RMS/peak/gain/THD, or exporting traces for further analysis.
Drive the QSpice MCP server end to end — discover or author a circuit, generate a netlist, run a simulation, and read or measure waveforms. Use when starting any QSpice task, when unsure which tool to call, when asked to simulate a circuit, build a buck/boost or other topology, inspect a .qsch, or read simulation results.
Diagnose and fix QSpice simulations that fail to converge, stop early, or produce no usable waveform. Use when a run errors, the log shows "no convergence", "timestep too small", singular-matrix, or gmin-stepping failures, or when V(out) is missing/flat after a simulation.