electronics-cooling

name	electronics-cooling
description	Electronics cooling — junction temperature, thermal resistance network, TIM selection, heat sink design, cold plates, thermoelectric coolers, forced air cooling, two-phase cooling.
metadata	{"priority":7,"promptSignals":{"phrases":["electronics cooling","junction temperature","thermal resistance","heat sink","TIM","cold plate","thermoelectric","CPU cooling","chip cooling"],"minScore":4}}

Electronics Cooling — Complete Skill

Thermal Resistance Network

Junction-to-Ambient Path

T_j = T_a + P × R_θja T_j = junction temperature [°C] — maximum limit T_a = ambient temperature [°C] P = power dissipated [W] R_θja = total thermal resistance junction-to-ambient [°C/W]

Series resistance chain: R_θja = R_θjc + R_θcs + R_θsa R_θjc = junction-to-case (from datasheet) R_θcs = case-to-heatsink (TIM + contact resistance) R_θsa = sink-to-ambient (heat sink + fan)

Target: T_j < T_j,max (datasheet limit: MOSFET 150-175°C, IC typically 125°C, GaN 200°C)

Datasheet Parameters (JEDEC)

θ_JC: junction to case (bottom of package) — from datasheet θ_JB: junction to board θ_JA: junction to ambient (standard test conditions — NOT for design, test-only value) Ψ_JT: junction to top-of-package psi (partial resistance, useful with external heatsink)

For heatsink attachment: T_j = T_a + P×(θ_JC + R_θCS + R_θSA)

Thermal Interface Materials (TIM)

TIM Types and Conductivity

TIM Type	k [W/m·K]	R_θcs [cm²·K/W]	Rework	Application
Air gap (no TIM)	0.025	>>10	—	Never use
Thermal grease (silicone)	1-4	0.1-0.5	Easy	CPU, power modules
Phase-change material	3-7	0.1-0.4	Moderate	Reflow soldering, BGA
Thermal pad (silicone)	3-8	0.3-1.0	Easy	LED, power resistors
Indium foil	85	0.01-0.05	Difficult	High performance, RF
Solder (SnBi)	57	0.01-0.03	Difficult	Flip-chip, COB
Diamond-filled epoxy	10-15	0.05-0.15	No rework	Permanent high power

Bond line thickness (BLT): thinner = lower resistance; typical 50-150 μm for greases R_TIM = BLT / (k_TIM × A_contact) + R_contact_resist (spreading + interface)

Heat Sink Analysis

Thermal Resistance (Natural Convection)

R_θsa = 1/(h × A_total × η_o) η_o = overall surface efficiency (see fins skill) h_natural ≈ 5-15 W/m²K (still air, vertical fin, depends on ΔT)

Forced convection (fan-cooled heat sink): h_forced ≈ 30-150 W/m²K (depends on airflow velocity) Q_air = 1.2 [kg/m³] × V̇ [m³/s] × c_p [1000 J/kgK] × ΔT_air ΔT_air = P / (ρ × V̇ × c_p) T_hs,out = T_a,in + ΔT_air (heat sink outlet temp = ambient rise)

R_θsa for finned heat sink (forced air): R_θsa = ΔT_air + R_hs = P/(ρV̇c_p) + 1/(h×A_total×η_o)

Fan Curve and Operating Point

Fan curve: ΔP vs. V̇ (static pressure vs. volumetric flow) System curve: ΔP = K × V̇² (pressure drop through heat sink) Operating point: intersection of fan curve and system curve Fan law: V̇ ∝ N, ΔP ∝ N², P_fan ∝ N³

Fan redundancy: 2N (full redundancy), N+1 (one spare) for critical systems

Cold Plate Design (Liquid Cooling)

Single-Phase Liquid

Q = ṁ × c_p × (T_out - T_in) R_cold_plate = (T_surface - T_fluid_avg) / P R_total = R_cp + R_TIM + R_JC

Microchannel cold plate: h ≈ Nu × k_fluid / D_h Nu ≈ 3.66 (laminar, constant T); 4.36 (laminar, constant q) Re = ρ × V × D_h / μ < 2300 for laminar (microchannels usually laminar) Pressure drop: ΔP = f × (L/D_h) × ½ρV² (Moody chart) + minor losses

Water performance: k=0.6 W/mK, c_p=4200 J/kgK, Pr=6.9 → high h capability Typical cold plate R: 0.01-0.1 °C/W (200W chips → ΔT = 2-20°C)

Two-Phase Cooling (Phase Change)

Evaporative: liquid evaporates at chip → latent heat absorption Much higher heat flux capacity than single-phase Loop heat pipe: wick-assisted, passive, no pump Vapor chamber: 2D heat pipe, spreads heat isotropically Microchannel two-phase: highest heat flux capability (>1000 W/cm²)

Thermoelectric Cooler (Peltier)

Operation

DC current through Peltier element → one side cools, other side heats Qc = α × Tc × I - ½I²R - K(Th-Tc) [cooling capacity] α = Seebeck coefficient [V/K], R = electrical resistance, K = thermal conductance

COP: COP = Qc / P_input = Qc / (Qh - Qc) Maximum COP (optimized I): COP_max ≈ ZTc²/(2√(1+ZT_avg)(Th-Tc)) - (Th-Tc)/2Tc ZT = α²T/(ρk) = figure of merit (ZT ≈ 1 for Bi₂Te₃ at room temperature)

Limitations: low COP (0.3-0.7 for ΔT=20°C), requires rejecting Qc + P_input to ambient Use for: spot cooling, cold below ambient, temperature control (laser stabilization) NOT for: bulk electronics cooling (too inefficient)

System-Level Thermal Design

Thermal Budget Allocation

Total thermal resistance budget: R_budget = (T_j,max - T_a,max) / P Typical desktop: T_j=100°C, T_a=40°C, P=100W → R_budget = 0.6°C/W Allocate: R_JC=0.1, R_TIM=0.1, R_HS=0.4 → R_total=0.6 ✓

Power Map (Multi-Component)

Each component: T_j = T_a + P_i × R_ja,i [individual] Shared heat sink: interaction between components (cross-talk) Use thermal simulation (FloTHERM, ANSYS Icepak, 6SigmaET)

Thermal Design Power (TDP) vs. Peak Power

TDP = long-term sustainable power (used for cooling design) Peak = transient power (limited by thermal capacitance of chip) Thermal mass: Q = m × c_p × ΔT (absorbs short power spikes) JEDEC JESD51: thermal transient testing → Zth (transient thermal impedance)

Cooling Method Selection Guide

Power [W/cm²]	Method
< 1	Natural convection, simple PCB
1-5	Heat sink + natural convection
5-20	Heat sink + forced air (fan)
20-50	Cold plate (liquid) or vapor chamber
50-200	Microchannel cold plate
200-1000	Two-phase microchannel, spray cooling
> 1000	Jet impingement, advanced two-phase

Output

Provide: T_junction [°C], R_θja breakdown (JC/TIM/SA), P_max for T_j,max [W], TIM recommendation (k, BLT), heat sink R_θsa required [°C/W], fan flow rate V̇ [m³/s], cold plate ΔT [°C].