菜单
Route one-sentence vibe_soc feature, RTL, integration, verification, synthesis, register, CRG, low-power, or PD requests into the smallest safe Loop execution packet. Use for SoC work that needs task classification, MCP selection, pipeline state, or delivery closure.
用 Codex 或 Claude 帮你安装 复制这段 Prompt，粘贴到 Codex、Claude 或其他助手里，让它检查 Skill 页面并帮你完成安装。
基于 SOC 职业分类
Create and operate canonical SoC project/module scaffolds through registered MCP tools for filelists, lint, compile, simulation, regression, coverage, and synthesis. Use for SoC project setup and any EDA Make-target execution.
Close stale multi-stage SoC delivery evidence for a router-selected merge or signoff packet. Use only when vibe-soc-loop delegates final architecture, doc, RTL, verification, synthesis, integration, or PD closure; do not use for ordinary dev iterations.
Generate Synopsys .db technology or stub libraries for early synthesis and link. Use when converting Liberty .lib to .db with lc_shell, or when creating a minimal black-box Liberty/.db from a Verilog top module port list.
Prepare and run local-default OpenROAD-flow-scripts physical-design handoff for silicon-crew SoC projects. Use when Codex needs to generate ORFS config/SDC under pd/openroad, run synth/floorplan/place/cts/route/finish/all stages through the default local ORFS path or explicit container backends, summarize OpenROAD reports/results, or connect vibe_soc-style RTL projects to OpenROAD.
Convert reviewed clock/reset Excel design tables into Draw.io and Excalidraw topology diagrams. Use for CRG source, mux, divider, OCC, ICG, and reset-chain visualization.
Convert a CRG requirement table into clock/reset design tables, PLL recommendations, and an architecture report. Use before clock/reset diagram generation when requirements are supplied as Excel or CSV.
| name | vibe-soc-loop |
| description | Route one-sentence vibe_soc feature, RTL, integration, verification, synthesis, register, CRG, low-power, or PD requests into the smallest safe Loop execution packet. Use for SoC work that needs task classification, MCP selection, pipeline state, or delivery closure. |
Turn the request into one outcome-first execution packet, then complete it with the fewest useful tool loops.
python3 <root>/.agents/scripts/loop_context.py <workspace> --format text.
Use --mode merge only when preparing delivery; never lower the returned
mode or scope.dev. Use soc-pipeline only for
multi-stage merge/signoff closure. Deterministic generators and registered
MCP tools remain executors, not extra coordinator layers.dev, leave the owned stage open and report mode, files, checks, and next
delivery action. In delivery modes, close only stale stages, run the mapped
reviewer once, then verify readiness with the router.Do not hand-write generated tops/CRG logic, bypass registered EDA tools, add a review/signoff pipeline stage, or narrate routine tool calls.