Passive synthesis tool profiles (yosys, dc_shell, genus) for replayable runs and comparable summary outputs.
Passive synthesis tool profiles (yosys, dc_shell, genus) for replayable runs and comparable summary outputs.
npx skills add https://github.com/babyworm/rtl-agent-team --skill syn-tool-profiles复制此命令并粘贴到 Claude Code 中以安装该技能
This skill should be used when initializing a new RTL project with directory structure, rules, guides, and template files. Triggers on 'init project', 'initialize project', 'new project', 'project init'.
SystemVerilog coding convention and design guideline skill. Enforces lowRISC style + project overrides for all .sv/.v file generation. Covers naming, module structure, power optimization, FPGA considerations, and pipelining for timing closure.
Policy rules, weights defaults, timing-first heuristic, convergence criteria, DC Tcl fragments, and rollback protocol for the DC-based PPA optimization pipeline. Pure reference — no orchestration.
This skill should be used when the user asks to "develop BFM", "create SystemC TLM model", "build bus functional model", "implement TLM-2.0 BFM", "model AMBA protocol in SystemC", or when Phase 3 transaction-level models are needed for performance estimation or protocol verification.
This skill should be used when the user asks to "build a reference model", "create C ref model", "write golden model", "implement functional reference", "bitexact reference for RTL verification", or when a Phase 2 C functional reference model is needed for algorithm validation or bandwidth analysis.
This skill should be used when the user asks to "instantiate IP", "generate IP wrapper", "create RTL wrapper for IP", "integrate third-party IP", "wrap IP-XACT descriptor", or when a convention-compliant SV wrapper module is needed for a third-party memory, PLL, PHY, or DSP block.
| name | syn-tool-profiles |
| description | Passive synthesis tool profiles (yosys, dc_shell, genus) for replayable runs and comparable summary outputs. |
| user-invocable | false |
syn/scripts/run_syn.shtool, status, area, timing_summary, log_path, replay_path--max-cores (default 8) via
set_host_options / set_db max_cpus_per_server. Tools auto-limit to the
licensed/physical maximum, so over-requesting is safe (graceful degradation).sram_sp/tp/dp) keeps its 2-D array under
synopsys translate_off, so DC/Genus skip it. With no compiled macro linked,
run_syn.sh blackboxes the wrapper (set_dont_touch + set_disable_timing) and
WARNs. Select a process with --mem-process and link the macro with --mem-lib
for real timing/area. See the synth-memory-blackbox design spec.syn/
├── db/ — Binary databases (.ddc, .db, .genus_db)
├── vnet/ — Gate-level netlists (.v, .json)
├── svf/ — Setup Verification Flow (.svf, DC only)
├── scr/ — Generated scripts (.tcl, .ys) + replay/
├── rpt/ — Reports (area, timing, power, qor)
├── log/ — Synthesis logs
├── temp/ — Cache and temporary files
└── work/ — Tool work directories
yosys:
syn/scripts/run_syn.sh --tool yosys --top <top> -f rtl/filelist_top.fsyn/scripts/run_syn.sh --tool yosys --top <top> -f rtl/filelist_top.f --liberty <lib>dc_shell:
syn/scripts/run_syn.sh --tool dc_shell --top <top> -f rtl/filelist_top.f--liberty <tech.lib> --sdc <design.sdc> --script <dc.tcl> --max-cores <n>--mem-process <NAME> --mem-lib <macro.db> --mem-module <name> --mem-strict.ddc → syn/db/, netlist → syn/vnet/, .svf → syn/svf/, .synopsys_dc.setup → syn/scr/genus:
syn/scripts/run_syn.sh --tool genus --top <top> -f rtl/filelist_top.f--liberty <tech.lib> --sdc <design.sdc> --script <genus.tcl> --max-cores <n>--mem-process <NAME> --mem-lib <macro.db> --mem-module <name> --mem-strict.genus_db → syn/db/, netlist → syn/vnet/| Tier | Tools | Capabilities | sv2v Handling |
|---|---|---|---|
| 1 (commercial) | dc_shell, genus | Full synthesis + timing + area + PPA | Not needed (native SV support) |
| 2 (oss) | yosys | Latch detection, unmapped cells, basic area estimate | Script handles internally (Layer 2) |
| 3 (none) | — | Synthesis skipped with WARNING | N/A |
Use get_synthesis_tier() from lib/tool-runner.sh to determine tier at runtime.
sv2v Policy: sv2v is a Layer 2 concern — run_syn.sh handles it internally for Yosys.
Agent prompts and policy skills MUST NOT instruct manual sv2v execution.
Canonical source stays SystemVerilog; tool adaptation is the script's responsibility.
--skip-if-unavailable flag: When passed to run_syn.sh, tool absence or license failure
produces WARNING + clean exit (exit 0) instead of hard failure. Use in optional synthesis contexts
(Stream B smoke test, V8 estimation without commercial tools).
FAIL: tool fatal error, netlist generation failure, or unusable reportPASS: synthesis completes and required summary artifacts are generatedSKIPPED: tool not available and --skip-if-unavailable was set (non-blocking)