guide-performance-optimization Diagnose RISC-V performance root causes and give evidence-based guidance without editing code, generating patches, or choosing implementations. Use for a named function or hot region with perf annotate or perf report, objdump or llvm-objdump disassembly, and optional perf stat, readelf -A, or hwprobe; or for RISC-V/RVV performance questions about unvectorized loops, vsetvl, LMUL/register groups, fixed-width VLEN/LMUL, packed low-bit decoding, hand-written assembly, matrix-engine or packed-SIMD offload, control flow or layout, register pressure, FP, traps, JIT codegen, timers, interrupts, privileged CSRs, glibc, Go, or crypto. Supports profile-backed diagnosis, labeled static-only analysis, and comparison of a few functions measured with the same event, input, and window. Do not use for non-RISC-V targets, isolated instruction/CSR/extension semantics, code-change or patch requests, or implementation selection. With no profile or disassembly, return a constrained hypothesis-only blueprint without asking.