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vivado-floorplan

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Actualizado22 de abril de 2026 a las 23:03

Create Pblock floorplan constraints in Vivado. Use when dealing with placement congestion, SSI multi-die devices, reconfigurable partitions (DFX), or when critical paths need physical locality.

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devansh0703

devansh0703/vivaclaw-agent

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SKILL.md

readonly

name	vivado-floorplan
version	1.0.0
description	Create Pblock floorplan constraints in Vivado. Use when dealing with placement congestion, SSI multi-die devices, reconfigurable partitions (DFX), or when critical paths need physical locality.
metadata	{"openclaw":{"requires":{"bins":["vivado"]},"emoji":"🗺️"}}

Vivado Floorplanning Runbook

1. Congestion Check

Invoke floorplanning if congestion score > 5: report_design_analysis -complexity -congestion -file /tmp/vivaclaw_rpt/congestion.rpt

2. Pblock Creation

create_pblock pblock_dsp_accel
add_cells_to_pblock [get_pblocks pblock_dsp_accel] [get_cells -hierarchical module_name/*]
resize_pblock [get_pblocks pblock_dsp_accel] -add {SLICE_X20Y20:SLICE_X40Y60}
set_property CONTAIN_ROUTING true [get_pblocks pblock_dsp_accel]

3. Resource Alignment

Pblocks must include specific resource columns (BRAM/DSP) if assigned cells use them. resize_pblock [get_pblocks <pb>] -add {RAMB36_X2Y5:RAMB36_X3Y10}

4. SSI / Multi-Die (SLR)

Assign logic to a specific Super Logic Region:

resize_pblock [get_pblocks <pb>] -add [get_sites -of_objects [get_slrs SLR0]]

Constraint: High-speed buses crossing SLRs incur 1-3ns delay. Pipeline crossings.

5. DFX (Partial Reconfiguration)

set_property HD.RECONFIGURABLE true [get_cells <inst>]
create_pblock <pb>
add_cells_to_pblock <pb> [get_cells <inst>]
set_property SNAPPING_MODE ON [get_pblocks <pb>]

Check report_pblock for overlaps or overfilling.

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name	vivado-floorplan
version	1.0.0
description	Create Pblock floorplan constraints in Vivado. Use when dealing with placement congestion, SSI multi-die devices, reconfigurable partitions (DFX), or when critical paths need physical locality.
metadata	{"openclaw":{"requires":{"bins":["vivado"]},"emoji":"🗺️"}}

Vivado Floorplanning Runbook

1. Congestion Check

Invoke floorplanning if congestion score > 5: report_design_analysis -complexity -congestion -file /tmp/vivaclaw_rpt/congestion.rpt

2. Pblock Creation

create_pblock pblock_dsp_accel
add_cells_to_pblock [get_pblocks pblock_dsp_accel] [get_cells -hierarchical module_name/*]
resize_pblock [get_pblocks pblock_dsp_accel] -add {SLICE_X20Y20:SLICE_X40Y60}
set_property CONTAIN_ROUTING true [get_pblocks pblock_dsp_accel]

3. Resource Alignment

Pblocks must include specific resource columns (BRAM/DSP) if assigned cells use them. resize_pblock [get_pblocks <pb>] -add {RAMB36_X2Y5:RAMB36_X3Y10}

4. SSI / Multi-Die (SLR)

Assign logic to a specific Super Logic Region:

resize_pblock [get_pblocks <pb>] -add [get_sites -of_objects [get_slrs SLR0]]

Constraint: High-speed buses crossing SLRs incur 1-3ns delay. Pipeline crossings.

5. DFX (Partial Reconfiguration)

set_property HD.RECONFIGURABLE true [get_cells <inst>]
create_pblock <pb>
add_cells_to_pblock <pb> [get_cells <inst>]
set_property SNAPPING_MODE ON [get_pblocks <pb>]

Check report_pblock for overlaps or overfilling.