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SkillsMP は MikeTreml/MissionControl から 1,968 件の skill を収集しています。skill を開くとソースと詳細を確認できます。
MikeTreml/MissionControl収集済み skill 1,968 件中 40 件を表示しています。
Expert skill for Prometheus metrics and Grafana dashboards. Write and validate PromQL queries, generate Grafana dashboard JSON, create alerting and recording rules, analyze metric cardinality, and debug scrape configurations.
原文の言語: 英語
Enterprise secrets management across platforms. Manage secrets with HashiCorp Vault, AWS Secrets Manager, Azure Key Vault, GCP Secret Manager, and Kubernetes secrets. Configure rotation, policies, and access controls.
原文の言語: 英語
Service mesh configuration and operations expertise for Istio, Linkerd, and Consul Connect
原文の言語: 英語
Specialized skill for Terraform and Infrastructure as Code operations. Execute terraform commands, validate HCL, analyze state and drift, generate modules, and support multi-cloud providers (AWS, GCP, Azure).
原文の言語: 英語
Deep expertise in ARM Cortex-M architecture and peripherals
原文の言語: 英語
CAN/CAN-FD bus analysis and development expertise
原文の言語: 英語
Embedded cryptographic operations and secure element integration. Expert skill for hardware crypto accelerators, secure key storage, TrustZone configuration, and side-channel attack mitigation.
原文の言語: 英語
Embedded firmware documentation generation and maintenance using Doxygen and related tools. Expert skill for API documentation, hardware interface documentation, memory maps, and integration with documentation systems.
原文の言語: 英語
Expert skill for FreeRTOS configuration, debugging, and optimization
原文の言語: 英語
Deep integration with JTAG/SWD debug probes for hardware-level debugging and flash programming
原文の言語: 英語
GNU linker script generation and optimization for embedded systems. Expert skill for memory layout definition, section placement, multi-image linking, and memory protection configuration.
原文の言語: 英語
Embedded memory analysis, optimization, and leak detection
原文の言語: 英語
MISRA C compliance checking and static analysis integration
原文の言語: 英語
Motor control algorithms and driver implementation
原文の言語: 英語
Nordic Semiconductor nRF5x/nRF Connect SDK expertise
原文の言語: 英語
Over-the-air firmware update implementation expertise for embedded systems. Expert skill for delta updates, image signing, update protocols, partition management, and rollback mechanisms.
原文の言語: 英語
Power consumption measurement and analysis expertise for embedded systems. Integrates with power analyzer tools to measure, profile, and optimize power consumption in battery-powered and energy-efficient designs.
原文の言語: 英語
Serial protocol analysis and debugging for common embedded interfaces (I2C, SPI, UART)
原文の言語: 英語
Test equipment integration for signal analysis (oscilloscope and logic analyzer)
原文の言語: 英語
STMicroelectronics STM32 HAL and Low-Level driver expertise
原文の言語: 英語
Embedded unit testing with Unity framework and CMock
原文の言語: 英語
USB device and host stack implementation expertise
原文の言語: 英語
Embedded wireless protocol implementation (LoRa, Zigbee, Thread, Matter)
原文の言語: 英語
Specialized skill for Zephyr RTOS development and configuration
原文の言語: 英語
Expert skill for AMBA AXI protocol implementation and verification in FPGA designs
原文の言語: 英語
Specialized skill for clock domain crossing analysis and synchronizer design in FPGA designs
原文の言語: 英語
Formal property verification and model checking skill for FPGA designs
原文の言語: 英語
On-chip debugging skill with ILA, VIO, and related FPGA debug tools
原文の言語: 英語
Specialized skill for finite state machine design and optimization in FPGAs
原文の言語: 英語
Multi-simulator expertise for functional verification of FPGA designs
原文の言語: 英語
Expert skill for C/C++ to RTL conversion using High-Level Synthesis tools
原文の言語: 英語
Vendor IP core configuration and integration expertise for FPGA designs
原文の言語: 英語
Expert skill for on-chip and external memory interface design in FPGAs
原文の言語: 英語
Expert skill for FPGA place and route optimization and physical implementation
原文の言語: 英語
FPGA power estimation and optimization skill for low-power design
原文の言語: 英語
RTL code quality checking and linting. Runs lint rules, identifies synthesis issues, detects inferred latches, and generates lint reports with waivers.
原文の言語: 英語
Specialized skill for creating and debugging SystemVerilog assertions for FPGA verification
原文の言語: 英語
Expertise in RTL optimization for FPGA synthesis tools. Analyzes synthesis reports, applies attributes, and guides resource inference for optimal QoR.
原文の言語: 英語
Expert skill for developing and validating timing constraints. Writes SDC (Synopsys Design Constraints) and XDC files for FPGA timing closure.
原文の言語: 英語
Deep expertise in Universal Verification Methodology (IEEE 1800.2) for FPGA verification
原文の言語: 英語