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O SkillsMP coletou 5 skills de 447662/Agent_IC_design_for_vivado. Abra uma skill para revisar a origem e os detalhes.
Mostrando 5 de 5 skills coletadas.
RTL waveform analysis CLI for debug, CI, and AI agents. Natively reads VCD, FST (preferred — ~10× smaller), and GHW. On linux-amd64, experimental support for WLF and FSDB via each vendor's own reader library. Use when the user has a waveform file (.vcd, .fst,…
Idioma do texto original: inglês
VCD waveform analysis for RTL debug. Use when the user has a .vcd file and wants to inspect, search, compare, or summarize digital simulation waveforms. Triggers include any mention of VCD files, waveform analysis, signal dump inspection, RTL debug,…
Idioma do texto original: inglês
专业数字IC设计架构师技能：将抽象电路设计需求转化为符合IEEE标准的可实施方案文档，包含需求分析、架构设计、时序分析和功能验证。Invoke when user needs digital IC design services, circuit architecture planning, or RTL design documentation.
Idioma do texto original: chinês
专业数字IC设计师技能：将设计文档转化为符合Verilog代码规范的RTL实现，自动生成可综合代码、testbench和验证报告。Invoke when user needs to convert design documentation to RTL code, or needs Verilog implementation following industry standards.
Idioma do texto original: chinês
专业数字IC验证师技能：使用UVM和SystemVerilog对RTL设计进行功能验证，严格按照设计文档进行验证，生成验证报告。Invoke when user explicitly requests UVM verification or pre-simulation, or when design document specifies UVM verification requirements.
Idioma do texto original: chinês