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arch-review
Read-only architecture review of RTL vs uArch spec with area/timing/power tradeoffs. Use for post-RTL architecture sign-off or suspected spec mismatch.
用 Codex 或 Claude 帮你安装 复制这段 Prompt,粘贴到 Codex、Claude 或其他助手里,让它检查 Skill 页面并帮你完成安装。
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Read-only architecture review of RTL vs uArch spec with area/timing/power tradeoffs. Use for post-RTL architecture sign-off or suspected spec mismatch.
用 Codex 或 Claude 帮你安装 复制这段 Prompt,粘贴到 Codex、Claude 或其他助手里,让它检查 Skill 页面并帮你完成安装。
基于 SOC 职业分类
Builds Phase 3 SystemC TLM-2.0 bus functional models with AMBA (AXI/AHB/APB) support. Use for 'develop BFM', 'SystemC TLM model', 'bus functional model'.
Encoder RD evaluation of C ref model: BD-PSNR/BD-rate (VCEG-M33) across sequences/QPs — 'RD eval', 'BD-rate', codec algorithm quality comparison.
Validate spec contracts across phase boundaries (P3 uarch to P4 RTL to P5 verify): port widths, memory class, REQ traceability. Use at P4/P5 entry.
Internal reference: p1 spec research policy (agent-loaded; do not invoke).
Full 6-phase RTL pipeline from spec to verified design (P1 research through P6 design note). Triggers: 'design a chip', 'full pipeline', 'autopilot'.
Initialize RTL project workspace: directory structure, coding rules, phase guides. Run once per project. Triggers: 'init project', 'new project'.
| name | arch-review |
| description | Read-only architecture review of RTL vs uArch spec with area/timing/power tradeoffs. Use for post-RTL architecture sign-off or suspected spec mismatch. |
| user-invocable | true |
Note: This skill intentionally saves to reviews/phase-2-architecture/ because it
re-validates the Phase 2 architecture after RTL implementation. It updates (not replaces)
the existing Phase 2 review artifacts with post-RTL findings per Hierarchical Spec Compliance.
<Use_When>
<Do_Not_Use_When>
<Why_This_Exists> Architecture review catches structural mismatches between spec and implementation that functional tests cannot detect. Three independent reviewers with different focus areas (structure, timing, quality) provide broader coverage than a single pass. </Why_This_Exists>
<Execution_Policy>
## Feature Coverage Checklist
| REQ ID | RTL Module | Status |
|--------|-----------|--------|
## Findings
### [severity] Finding-N: ...
## Verdict
PASS | FAIL: [reason]
```
7. Categorize issues: BLOCKER / WARN / SUGGESTION
<Tool_Usage>
Bash("mkdir -p reviews/phase-2-architecture")
Task(subagent_type="rtl-agent-team:rtl-architect",
prompt="READ-ONLY review. (1) Read docs/phase-1-research/iron-requirements.json and check every REQ-NNN item for implementation in rtl/. Produce a Feature Coverage Checklist with per-REQ status: COVERED, PARTIAL, or MISSING. (2) Compare docs/phase-3-uarch/*.md against rtl/. List any spec-RTL mismatches, missing modules, or unspecified additions. Verify port naming follows project convention: i_ prefix for inputs, o_ prefix for outputs, io_ prefix for bidirectional. Save the review result to reviews/phase-2-architecture/architecture-review.md in standard review Markdown format with Date, Reviewer (rtl-architect, timing-advisor, rtl-critic), Upper Spec (docs/phase-1-research/iron-requirements.json, docs/phase-3-uarch/*.md), Verdict, Feature Coverage Checklist table, Findings, and Verdict sections. If the file already exists, update it with the latest review results. Output final verdict: VERDICT: PASS or VERDICT: FAIL — [N] spec violations found.")
Task(subagent_type="rtl-agent-team:timing-advisor",
prompt="READ-ONLY review. Analyze rtl/ pipeline depth, clock domains ({domain}_clk naming, e.g. sys_clk), and reset strategy ({domain}_rst_n naming, e.g. sys_rst_n). Flag timing feasibility concerns and any clock/reset naming violations.")
Task(subagent_type="rtl-agent-team:rtl-critic",
prompt="READ-ONLY review. Assess rtl/ code quality: synthesizability, coding style (lowRISC base with project overrides: i_/o_/io_ port prefixes, {domain}_clk/{domain}_rst_n naming, logic only, u_ instance prefix, gen_ generate prefix), maintainability. List issues with severity.")
</Tool_Usage>
<Coding_Convention_Requirements> Reviewers must verify these project-specific conventions (overrides lowRISC defaults):
i_ (input), o_ (output), io_ (bidirectional) — NOT suffix _i/_oclk (single domain) or {domain}_clk (multiple domains, e.g., sys_clk) — NOT clk_irst_n (single domain) or {domain}_rst_n (multiple domains, e.g., sys_rst_n) — NOT rst_nilogic only — reg/wire forbiddenu_ (e.g., u_fifo) — generate prefix: gen_<Escalation_And_Stop_Conditions>
<Final_Checklist>