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babyworm/rtl-agent-team - Page 2

SkillsMP has collected 97 skills from babyworm/rtl-agent-team. Open a skill to review its source and details.

babyworm/rtl-agent-team

Showing 40 of 97 collected skills.

occupation
Computer Hardware Engineers
description

3-way bitexact comparison of C ref model vs SystemC BFM vs RTL on shared vectors; isolates which model drifted. Triggers: 'model consistency', 'model drift'.

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occupation
Computer Hardware Engineers
description

Internal reference: rtl p5s integration test policy (agent-loaded; do not invoke).

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occupation
Computer Hardware Engineers
description

Internal reference: rtl p3 uarch policy (agent-loaded; do not invoke).

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occupation
Computer Hardware Engineers
description

Internal reference: verification recheck policy (agent-loaded; do not invoke).

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occupation
Computer Hardware Engineers
description

Internal reference: rat p4p5 impl verify policy (agent-loaded; do not invoke).

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occupation
Computer Hardware Engineers
description

Internal reference: ppa optimizer dc policy (agent-loaded; do not invoke).

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occupation
Computer Hardware Engineers
description

Internal reference: rat p1p3 spec uarch policy (agent-loaded; do not invoke).

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occupation
Electrical Engineers
description

Auto-loop wrapper repeating rtl-ppa-optimize-dc until PPA convergence or plateau. Triggers: 'ultraloop PPA', 'PPA auto-loop', 'optimize PPA until converge'.

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occupation
Electrical Engineers
description

Phase 2 architecture with parallel team workers: dual-stream arch + RefC development. Use for 'arch team', 'Phase 2 team', 'parallel architecture'.

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occupation
Electrical Engineers
description

Phase 3 uArch with parallel team workers: dual-stream per-block uArch + BFM development. Use for 'uarch team', 'Phase 3 team', 'parallel uarch'.

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occupation
Electrical Engineers
description

One-shot DC synthesis PPA optimization iteration with equivalence+smoke validation; needs Phase 5 PASS and dc_shell/genus. Triggers: 'PPA optimize', 'DC PPA'.

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occupation
Electronics Engineers, Except Computer
description

Phase 1 research with parallel team workers for tree-of-thought candidate exploration. Use for 'research team', 'Phase 1 team', 'parallel research'.

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occupation
Electronics Engineers, Except Computer
description

Phase 4 RTL implementation with native team parallel workers for multi-module coding. Triggers: 'implement team', 'Phase 4 team', 'parallel implement'.

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occupation
Software Developers
description

Phase 5 verification with native team parallel workers across modules. Triggers 'verify team', 'parallel verify', 'Phase 5 team'; best for 3+ modules.

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occupation
Software Developers
description

Phase 1 spec research: refines spec, fills gaps via user Q&A, surveys algorithm candidates with trade-offs. Use for 'research', 'spec analysis', 'Phase 1'.

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occupation
Software Developers
description

Internal reference: code review policy (agent-loaded; do not invoke).

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occupation
Software Developers
description

Cross-review with Codex CLI as independent 2nd reviewer; finding exchange until consensus or escalation. At phase boundaries or on 'codex review'.

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occupation
Computer Hardware Engineers
description

Internal reference: lint tool profiles (agent-loaded; do not invoke).

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occupation
Computer Hardware Engineers
description

Internal reference: p2 arch design policy (agent-loaded; do not invoke).

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occupation
Computer Hardware Engineers
description

Phase 2 architecture design: HW feasibility of P1 candidates, block datapaths, reference C model. Use for 'architecture design', 'Phase 2', 'block design'.

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occupation
Software Developers
description

Internal reference: rat dse policy (agent-loaded; do not invoke).

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occupation
Software Developers
description

Iterative Design Space Exploration across Phase 1-3 with self-critique and worktree trial comparison. Use for 'DSE', 'compare architectures'.

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occupation
Software Developers
description

Sequential Phase 1-3 pipeline (research, architecture, uArch, BFM); stops before RTL for human review. Use for 'spec to uarch', 'design only'.

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occupation
Software Developers
description

Phase 1-3 pipeline running each phase's team skill with parallel workers. Use for 'spec to uarch team', 'Phase 1-3 team', 'parallel design pipeline'.

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occupation
Software Developers
description

Phase 4-to-5 pipeline: implement RTL then verify from existing P1-3 docs, with P5-to-P4 feedback; stops before Phase 6. Trigger: 'implement and verify'.

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occupation
Software Developers
description

Interactive plugin tutorial: key commands, 6-phase pipeline, team mode. Auto-detects language; append a language name to override. Trigger: 'tutorial'.

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occupation
Software Developers
description

Autonomous implement-review-improve loop wrapping a target skill (e.g. rtl-p4-block-parallel) for unattended runs. Triggers: 'ultraloop', 'autonomous loop'.

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occupation
Software Developers
description

Internal reference: refactor classification policy (agent-loaded; do not invoke).

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occupation
Software Developers
description

Internal reference: rtl block contract test policy (agent-loaded; do not invoke).

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occupation
Software Developers
description

Internal reference: rtl block interface policy (agent-loaded; do not invoke).

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occupation
Computer Hardware Engineers
description

Phase 3 uArch design: maps P2 blocks to sub-blocks with clock domains, FSM/SRAM allocation, BFM validation. Use for 'uarch', 'microarchitecture', 'Phase 3'.

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occupation
Computer Hardware Engineers
description

Internal reference: rtl p4 implement policy (agent-loaded; do not invoke).

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occupation
Computer Hardware Engineers
description

Phase 4 full RTL implementation from uarch specs with lint, review, and unit tests. Use when user says 'implement RTL', 'write RTL', or 'Phase 4'.

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occupation
Computer Hardware Engineers
description

Internal reference: rtl p4 rapid impl policy (agent-loaded; do not invoke).

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occupation
Computer Hardware Engineers
description

Phase 4 rapid RTL implementation: fast module+block sanity (lint/CDC/functional minimum) before deep verification. Lighter alternative to rtl-p4-implement.

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occupation
Computer Hardware Engineers
description

Internal reference: rtl p4s bugfix policy (agent-loaded; do not invoke).

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occupation
Computer Hardware Engineers
description

P4 RTL bug fix enforcing full cycle through TB update and functional simulation; lint-only is never complete. Use for 'fix RTL bug' or Phase 5-to-4 feedback.

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occupation
Computer Hardware Engineers
description

Internal reference: rtl p4s refactor policy (agent-loaded; do not invoke).

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occupation
Computer Hardware Engineers
description

P4 RTL refactor with no behavioral change: naming/style cleanup, module split/merge, equivalence verified. Trigger: 'refactor RTL'.

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occupation
Computer Hardware Engineers
description

Internal reference: rtl p4s unit test policy (agent-loaded; do not invoke).

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Showing 40 of 97 collected skills.