P4 Tier 2 unit tests: verify each RTL module against its uarch spec and C reference model. Use after lint+smoke pass, before Tier 3 regression.
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babyworm/rtl-agent-team - Page 3
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Phase 5 legacy bundled verification: functional + silicon checks in one flow. Triggers 'verify', 'Phase 5', 'run all checks'. New flows: prefer split P5A/P5B.
Internal reference: rtl p5a functional closure policy (agent-loaded; do not invoke).
Phase 5A functional closure: deep multi-seed regression, coverage, traceability at module/block/top. First stage of split P5, before P5B silicon validation.
Phase 5B silicon validation: synthesis, constraints, timing/CDC signoff posture, top integration checks. Run after P5A functional closure passes.
P5 CDC analysis: finds missing synchronizers and metastability risks, emits SDC constraints. Use for multi-clock designs or pre-synthesis CDC signoff.
Internal reference: rtl p5s coverage policy (agent-loaded; do not invoke).
Internal reference: rtl p5s perf policy (agent-loaded; do not invoke).
P5 bus protocol compliance for AXI/AHB/APB via SVA handshake and ordering checks. Use before SoC integration or to chase a reported protocol violation.
Internal reference: rtl p6 design review policy (agent-loaded; do not invoke).
Phase 6: design review and design-note documentation with consistency checks after P5 PASS. Triggers: 'design review', 'design note', 'Phase 6'.
Phase 7: free exploration of algorithm alternatives and optimization experiments, exempt from pipeline rules. Triggers: 'explore', 'Phase 7'.
LLM code review + controlled refactor with mandatory re-validation gates; cross-cutting support for P4-P6, not a phase step. Trigger: 'review and refactor'.
Internal reference: rtl silicon validation policy (agent-loaded; do not invoke).
systemc project conventions (loaded by writer agents; do not invoke).
Internal reference: test design policy (agent-loaded; do not invoke).
uvm project conventions (loaded by writer agents; do not invoke).