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codejunkie99
Perfil de criador do GitHub

codejunkie99

Visão por repositório de 97 skills coletadas em 11 repositórios do GitHub.

skills coletadas
97
repositórios
11
atualizado
18 de ago. de 2026
mapa de repositórios

Onde as skills estão

Principais repositórios por número de skills coletadas, com sua participação neste catálogo do criador e sua distribuição ocupacional.

Os 8 principais repositórios são exibidos aqui; a lista completa continua abaixo.
explorador de repositórios

Repositórios e skills representativas

apology-crafter
Escritores e autores

Use when the user wants to craft a sincere, accountable apology in both written and spoken versions, without deflection. Triggers include "draft an apology", "how should I apologize", "say sorry to".

26 de abr. de 2026
difficult-conversation-prep
Especialistas em recursos humanos

Use when the user wants to prepare for a hard conversation with empathetic-but-direct opening, defensiveness handling, and resolution paths. Triggers include "difficult conversation", "hard talk", "tough conversation prep".

26 de abr. de 2026
elevator-pitch-builder
Escritores e autores

Use when the user wants three energy-level variants of an elevator pitch (bold, conversational, data-driven). Triggers include "elevator pitch", "pitch this product", "30 second pitch".

26 de abr. de 2026
feedback-giver
Gerentes de recursos humanosGerentes gerais e de operações

Use when the user wants to draft spoken feedback using observation/impact/expectation/support framework. Triggers include "give feedback", "feedback to my report", "performance feedback".

26 de abr. de 2026
presentation-outliner
Escritores e autores

Use when the user wants a tight presentation outline with hook, problem, solution, evidence, objection handling, and clear CTA. Triggers include "outline a presentation", "talk outline", "structure my pitch deck".

26 de abr. de 2026
data-interpreter
Cientistas de dados

Use when the user wants plain-English interpretation of a dataset including patterns, surprises, and misleading aspects. Triggers include "analyze this data", "interpret these numbers", "what does this data mean".

26 de abr. de 2026
research-synthesizer
Cientistas sociais e trabalhadores relacionados, todos os outros

Use when the user has multiple research sources on a topic and wants genuine synthesis of themes, contradictions, and gaps — not separate summaries. Triggers include "synthesize this research", "compare these sources", "research synthesis".

26 de abr. de 2026
survey-analyzer
Analistas de pesquisa de mercado e especialistas em marketing

Use when the user wants to analyze survey results for findings, consensus, division, surprises, and actionable recommendations. Triggers include "analyze survey", "survey results", "what does this survey show".

26 de abr. de 2026
Mostrando 8 de 40 skills coletadas.
gf-tui
Desenvolvedores de software

GateFlow terminal console inspired by OpenClaw local TUI workflows. Shows workspace status, component inventory, tool health, map readiness, release readiness, and command shortcuts from one terminal surface.

21 de mai. de 2026
gf-release
Desenvolvedores de software

GateFlow release readiness workflow. Validates plugin manifests, marketplace metadata, docs index coverage, root mirrors, release notes, and component counts before a version tag is created. Use when preparing, checking, or cutting a GateFlow plugin release.

20 de mai. de 2026
gf-fusesoc
Engenheiros eletrônicos (exceto computadores)

FuseSoC build system integration for GateFlow. Generates .core files and drives synthesis/simulation through Edalize backends (Vivado, Quartus, open-source tools). Use when the user needs to create a FuseSoC core file, build with Edalize, or integrate RTL…

15 de abr. de 2026
gf-learn
Professores do ensino superior, todos os outros

SystemVerilog learning mode — generates exercises, reviews solutions, and teaches RTL design patterns. Use when the user wants to learn SystemVerilog, practice hardware design, get exercises, or understand verification methodology.

15 de abr. de 2026
gf-router
Engenheiros eletrônicos (exceto computadores)

Figures out what kind of digital hardware design task the user wants to do, then hands off to the right specialist. Use when the request is unclear, multi-step, or needs help deciding whether to simulate, synthesize, lint, or implement.

15 de abr. de 2026
gf
Engenheiros eletrônicos (exceto computadores)

Primary SystemVerilog/RTL orchestrator for GateFlow. Routes to specialist agents, runs verification, and iterates until working. Use when the user wants to create, test, fix, or implement any RTL design — FIFO, UART, AXI, state machines, or any digital…

15 de abr. de 2026
gf-summary
Engenheiros eletrônicos (exceto computadores)

Summarize Verilator, lint, or simulation output into a readable, actionable format. Use when the user wants to understand build output, lint errors, or simulation results from a Verilator or EDA tool run.

15 de abr. de 2026
gf-architect
Engenheiros eletrônicos (exceto computadores)

Codebase architect - Maps and documents SystemVerilog projects. This skill should be used when the user wants to understand a codebase structure, generate architecture documentation, or onboard to a new RTL project. Example requests: "map this codebase",…

11 de abr. de 2026
Mostrando 8 de 27 skills coletadas.
gateflow-behavior
Desenvolvedores de software

This skill should be used when the user is working on any SystemVerilog, Verilog, HDL, RTL, FPGA, or ASIC development task. Provides behavioral rules for GateFlow: auto-chain workflows, context-aware actions, and seamless tool execution without requiring…

5 de fev. de 2026
systemverilog-rtl-design
Desenvolvedores de software

Provides RTL design patterns, synthesis guidelines, and coding templates. Use when the user mentions 'module design', 'FSM', 'state machine', 'pipeline', 'synthesizable', 'parameterize', 'parameter', 'localparam', 'clock domain', 'CDC', 'FIFO', 'register…

5 de fev. de 2026
systemverilog-lint-fixing
Desenvolvedores de software

This skill should be used when the user mentions 'lint error', 'width mismatch', 'inferred latch', 'undriven signal', 'fix warnings', 'Verilator error', 'WIDTHTRUNC', 'BLKSEQ', or asks to 'check my code' or 'find errors'. Provides error-specific fix patterns…

5 de fev. de 2026
systemverilog-testbench-patterns
Analistas de garantia de qualidade de software e testadores

This skill should be used when the user asks to 'write a testbench', 'test this module', 'add assertions', 'create test stimulus', 'verify the design', 'add clock generation', or 'write a self-checking test'. Provides testbench templates, clock/reset…

5 de fev. de 2026
systemverilog-verification
Analistas de garantia de qualidade de software e testadores

Provides verification methodology, SVA assertion patterns, coverage techniques, and testbench templates. Use when the user mentions 'testbench', 'assertion', 'SVA', 'property', 'sequence', 'coverage', 'covergroup', 'coverpoint', 'bins', 'cross coverage',…

5 de fev. de 2026
vcd-waveform-analysis
Desenvolvedores de software

This skill should be used when the user mentions 'waveform', 'VCD file', 'simulation results', 'signal trace', 'debug the output', 'what happened in sim', 'show me the waves', or 'analyze timing'. Provides VCD parsing, clock detection, anomaly identification,…

5 de fev. de 2026
systemverilog-development
Desenvolvedores de software

This skill should be used when the user asks to 'design a module', 'write SystemVerilog', 'implement an FSM', 'create a pipeline', or works with .sv/.svh/.v/.vh files. Provides modern SV conventions, coding patterns, and synthesizability guidance.

5 de fev. de 2026
Mostrando 11 de 11 repositórios
Todos os repositórios foram exibidos