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codejunkie99
Perfil de creador de GitHub

codejunkie99

Vista por repositorio de 97 skills recopiladas en 11 repositorios de GitHub.

skills recopiladas
97
repositorios
11
actualizado
18 ago 2026
mapa de repositorios

Dónde viven las skills

Repositorios principales por número de skills recopiladas, con su participación en este catálogo del creador y su variedad ocupacional.

Aquí se muestran los 8 repositorios principales; la lista completa continúa abajo.
explorador de repositorios

Repositorios y skills representativas

apology-crafter
Escritores y autores

Use when the user wants to craft a sincere, accountable apology in both written and spoken versions, without deflection. Triggers include "draft an apology", "how should I apologize", "say sorry to".

26 abr 2026
difficult-conversation-prep
Especialistas en recursos humanos

Use when the user wants to prepare for a hard conversation with empathetic-but-direct opening, defensiveness handling, and resolution paths. Triggers include "difficult conversation", "hard talk", "tough conversation prep".

26 abr 2026
elevator-pitch-builder
Escritores y autores

Use when the user wants three energy-level variants of an elevator pitch (bold, conversational, data-driven). Triggers include "elevator pitch", "pitch this product", "30 second pitch".

26 abr 2026
feedback-giver
Gerentes de recursos humanosGerentes generales y de operaciones

Use when the user wants to draft spoken feedback using observation/impact/expectation/support framework. Triggers include "give feedback", "feedback to my report", "performance feedback".

26 abr 2026
presentation-outliner
Escritores y autores

Use when the user wants a tight presentation outline with hook, problem, solution, evidence, objection handling, and clear CTA. Triggers include "outline a presentation", "talk outline", "structure my pitch deck".

26 abr 2026
data-interpreter
Científicos de datos

Use when the user wants plain-English interpretation of a dataset including patterns, surprises, and misleading aspects. Triggers include "analyze this data", "interpret these numbers", "what does this data mean".

26 abr 2026
research-synthesizer
Científicos sociales y trabajadores relacionados, todos los demás

Use when the user has multiple research sources on a topic and wants genuine synthesis of themes, contradictions, and gaps — not separate summaries. Triggers include "synthesize this research", "compare these sources", "research synthesis".

26 abr 2026
survey-analyzer
Analistas de investigación de mercados y especialistas en marketing

Use when the user wants to analyze survey results for findings, consensus, division, surprises, and actionable recommendations. Triggers include "analyze survey", "survey results", "what does this survey show".

26 abr 2026
Mostrando 8 de 40 skills recopiladas.
gf-tui
Desarrolladores de software

GateFlow terminal console inspired by OpenClaw local TUI workflows. Shows workspace status, component inventory, tool health, map readiness, release readiness, and command shortcuts from one terminal surface.

21 may 2026
gf-release
Desarrolladores de software

GateFlow release readiness workflow. Validates plugin manifests, marketplace metadata, docs index coverage, root mirrors, release notes, and component counts before a version tag is created. Use when preparing, checking, or cutting a GateFlow plugin release.

20 may 2026
gf-fusesoc
Ingenieros electrónicos (excepto computadoras)

FuseSoC build system integration for GateFlow. Generates .core files and drives synthesis/simulation through Edalize backends (Vivado, Quartus, open-source tools). Use when the user needs to create a FuseSoC core file, build with Edalize, or integrate RTL…

15 abr 2026
gf-learn
Profesores postsecundarios, todos los demás

SystemVerilog learning mode — generates exercises, reviews solutions, and teaches RTL design patterns. Use when the user wants to learn SystemVerilog, practice hardware design, get exercises, or understand verification methodology.

15 abr 2026
gf-router
Ingenieros electrónicos (excepto computadoras)

Figures out what kind of digital hardware design task the user wants to do, then hands off to the right specialist. Use when the request is unclear, multi-step, or needs help deciding whether to simulate, synthesize, lint, or implement.

15 abr 2026
gf
Ingenieros electrónicos (excepto computadoras)

Primary SystemVerilog/RTL orchestrator for GateFlow. Routes to specialist agents, runs verification, and iterates until working. Use when the user wants to create, test, fix, or implement any RTL design — FIFO, UART, AXI, state machines, or any digital…

15 abr 2026
gf-summary
Ingenieros electrónicos (excepto computadoras)

Summarize Verilator, lint, or simulation output into a readable, actionable format. Use when the user wants to understand build output, lint errors, or simulation results from a Verilator or EDA tool run.

15 abr 2026
gf-architect
Ingenieros electrónicos (excepto computadoras)

Codebase architect - Maps and documents SystemVerilog projects. This skill should be used when the user wants to understand a codebase structure, generate architecture documentation, or onboard to a new RTL project. Example requests: "map this codebase",…

11 abr 2026
Mostrando 8 de 27 skills recopiladas.
gateflow-behavior
Desarrolladores de software

This skill should be used when the user is working on any SystemVerilog, Verilog, HDL, RTL, FPGA, or ASIC development task. Provides behavioral rules for GateFlow: auto-chain workflows, context-aware actions, and seamless tool execution without requiring…

5 feb 2026
systemverilog-rtl-design
Desarrolladores de software

Provides RTL design patterns, synthesis guidelines, and coding templates. Use when the user mentions 'module design', 'FSM', 'state machine', 'pipeline', 'synthesizable', 'parameterize', 'parameter', 'localparam', 'clock domain', 'CDC', 'FIFO', 'register…

5 feb 2026
systemverilog-lint-fixing
Desarrolladores de software

This skill should be used when the user mentions 'lint error', 'width mismatch', 'inferred latch', 'undriven signal', 'fix warnings', 'Verilator error', 'WIDTHTRUNC', 'BLKSEQ', or asks to 'check my code' or 'find errors'. Provides error-specific fix patterns…

5 feb 2026
systemverilog-testbench-patterns
Analistas de garantía de calidad de software y probadores

This skill should be used when the user asks to 'write a testbench', 'test this module', 'add assertions', 'create test stimulus', 'verify the design', 'add clock generation', or 'write a self-checking test'. Provides testbench templates, clock/reset…

5 feb 2026
systemverilog-verification
Analistas de garantía de calidad de software y probadores

Provides verification methodology, SVA assertion patterns, coverage techniques, and testbench templates. Use when the user mentions 'testbench', 'assertion', 'SVA', 'property', 'sequence', 'coverage', 'covergroup', 'coverpoint', 'bins', 'cross coverage',…

5 feb 2026
vcd-waveform-analysis
Desarrolladores de software

This skill should be used when the user mentions 'waveform', 'VCD file', 'simulation results', 'signal trace', 'debug the output', 'what happened in sim', 'show me the waves', or 'analyze timing'. Provides VCD parsing, clock detection, anomaly identification,…

5 feb 2026
systemverilog-development
Desarrolladores de software

This skill should be used when the user asks to 'design a module', 'write SystemVerilog', 'implement an FSM', 'create a pipeline', or works with .sv/.svh/.v/.vh files. Provides modern SV conventions, coding patterns, and synthesizability guidance.

5 feb 2026
Mostrando 11 de 11 repositorios
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